AD7666AST datasheet(18/29 Pages) AD

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AD7666

Rev. 0 | Page 17 of 28

Transfer Functions

Table 7. Output Codes and Ideal Input Voltages

Digital Output Code (Hex)

Description

Analog

Input

Straight

Binary

Twos

Complement

FSR –1 LSB

2.499962 V

FFFF1

7FFF1

FSR – 2 LSB

2.499923 V

FFFE

7FFE

Midscale + 1 LSB

1.250038 V

8001

0001

Midscale

1.25 V

8000

0000

Midscale – 1 LSB

1.249962 V

7FFF

FFFF

–FSR + 1 LSB

38 µV

0001

8001

–FSR

0 V

00002

80002

Using the OB/2C digital input, the AD7666 offers two output

codings: straight binary and twos complement. The LSB size is

VREF/65536, which is about 38.15 µV. The AD7666’s ideal

transfer characteristic is shown in Figure 25 and Table 7.

000...000

000...001

000...010

111...101

111...110

111...111

ANALOG INPUT

VREF – 1.5 LSB

VREF – 1 LSB

1LSB

0.5 LSB

1 LSB = V REF/65536

1This is also the code for overrange analog input (VIN – VINGND above

VREF – VREFGND).

2This is also the code for underrange analog input (VIN below VINGND).

Figure 25. ADC Ideal Transfer Function

NOTES

1THE CONFIGURATION SHOWN IS USING THE INTERNAL REFERENCE AND INTERNAL BUFFER.

2THE AD8021 IS RECOMMENDED. SEE DRIVER AMPLIFIER CHOICE SECTION.

3OPTIONAL LOW JITTER.

4A 10

µF CERAMIC CAPACITOR (X5R, 1206 SIZE) IS RECOMMENDED (e.g., PANASONIC ECJ3YB0J106M).

SEE VOLTAGE REFERENCE INPUT SECTION.

AD7666

CLOCK

µC/µP/DSP

SERIAL

PORT

DIGITAL SUPPLY

(3.3V OR 5V)

DVDD

100nF

µF

100nF

µF

Ω

100nF

µF

ANALOG

SUPPLY

(5V)

ANALOG INPUT

(0V TO 2.5V)

RESET

SER/PAR

OB/2C

BUSY

SDOUT

SCLK

INGND

REFGND

REF

AGND

AVDD

DGND

DVDD

OVDD

OGND

U12

PDREF

PDBUF

CNVST

REFBUFIN1

100nF

BYTESWAP

CR4

2.7nF

Ω

Figure 26. Typical Connection Diagram

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