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MIC3839 Datasheet(PDF) 2 Page - Micrel Semiconductor |
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MIC3839 Datasheet(HTML) 2 Page - Micrel Semiconductor |
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2 / 11 page ![]() MIC3838/3839 Micrel MIC3838/3839 2 August 2003 Ordering Information Turn On Turn Off Part Number Threshold Threshold Temperature Range Package MIC3838BMM 12.5V 8.3V –40 °C to +85°C MSOP-10 MIC3839BMM 4.3V 4.1V –40 °C to +85°C MSOP-10 Pin Configuration 1 COMP FB ILIM RAMP 10 VREF VDD OUTA OUTB 9 8 7 2 3 4 RC GND 6 5 MSOP-10 (MM) Pin Description Pin Number Pin Name Pin Function 1 COMP COMP is the output of the error amplifier and the input of the PWM comparator. The error amplifier in the MIC3838 is a true low-output imped- ance, 4MHz operational amplifier. As such, the COMP pin can both source and sink current. However, the error amplifier is internally current limited, so that zero duty cycle can be externally forced by pulling COMP to GND. The MIC3838 family features built-in full cycle soft start. Soft start is imple- mented as a clamp on the maximum COMP voltage. 2 FB The inverting input to the error amplifier. 3 ILIM The input to the peak current, and overcurrent comparators. The overcurrent comparator is only intended for fault sensing. Exceeding the overcurrent threshold will cause a soft start cycle. An internal MOSFET discharges the current sense filter capacitor to improve dynamic perfor- mance of the power converter. 4 RAMP Input to the PWM comparator. Sawtooth ramp for PWM control. Allows for either current-mode or voltage-mode control. An internal MOSFET dis- charges the current sense filter capacitor. 5 RC The oscillator programming pin. Only two components are required to program the oscillator, a resistor (tied between V DD and RC), and a capaci- tor (tied between RC and GND). The approximate oscillator frequency is determined by the simple formula: F 1.41 RC OSCILLATOR = × The recommended range of timing resistors is between 7k Ω and 200kΩ and range of timing capacitors is between 100pF and 1000pF. Timing resistors less than 7k Ω should be avoided. For best performance, keep the leads between components as short as possible. Separate ground and VDD traces to the external timing network are encouraged. 6 GND Ground. Return path for signal and gate drive functions. |
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