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ACE24LA64AFMTH Datasheet(PDF) 7 Page - ACE Technology Co., LTD.

Part # ACE24LA64AFMTH
Description  Two-wire Serial EEPROM
PDF  18 Pages
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Manufacturer  ACE [ACE Technology Co., LTD.]
Direct Link  http://www.ace-ele.com
Logo ACE - ACE Technology Co., LTD.

ACE24LA64AFMTH Datasheet(HTML) 7 Page - ACE Technology Co., LTD.

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ACE24LA64A
Two-wire Serial EEPROM
VER 1.1
7
in the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a "0" and the
addressing device, such as a microcontroller, must terminate the write sequence with a stop condition. At
this time the EEPROM enters an internally timed write cycle, tWR, to the nonvolatile memory. All inputs are
disabled during this write cycle and the EEPROM will not respond until the write is complete (see Figure
6).
The data word address lower five bits are internally incremented following the receipt of each data word.
The higher data word address bits are not incremented, retaining the memory page row location. When
the word address, internally generated, reaches the page boundary, the following byte is placed at the
beginning of the same page. If more than 32 data words are transmitted to the EEPROM, the data word
address will "roll over" and previous data will be overwritten.
Acknowledge Polling:
The Identification Page (32 bytes) is an additional page which can be written and (later) permanently
locked in Read-only mode. It is written by issuing the Write Identification Page instruction. This instruction
uses the same protocol and format as Page Write (into memory array), except for the following
differences:
Read Operations
Read operations are initiated the same way as write operations with the exception that the read/write
select bit in the device address word is set to
“1". There are three read operations: current address read,
random address read and sequential read.
Current Address Read:
The internal data word address counter maintains the last address accessed during the last read or
write operation, incremented by one. This address stays valid between operations as long as the chip
power is maintained. The address "roll over" during read is from the last byte of the last memory page to
the first byte of the first page. The address "roll over" during write is from the last byte of the current
page to the first byte of the same page.Once the device address with the read/write select bit set to "1"
is clocked in and acknowledged by the EEPROM, the current address data word is serially clocked out.
The microcontroller does not respond with an input "0" but does generate a following stop condition
(see Figure 7).
Random Read:
A random read requires a “dummy” byte write sequence to load in the data word address. Once the
device address word and data word address are clocked in and acknowledged by the EEPROM, the
microcontroller must generate another start condition. The microcontroller now initiates a current address
read by sending a device address with the read/write select bit high. The EEPROM acknowledges the
device address and serially clocks out the data word. The microcontroller does not respond with a
“0” but
does generate a following stop condition (see Figure 8).



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