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.

VM

VSS

VDD

100 k

Ω

VGND

VSS

VOUT

CF

(optional)

VDD

C1

C2

capacitive

sensor

1

2

3

4

5

6

7

14

13

12

11

89

10

GAIN

OFADJ

AGND

CF

VM

VSSA

VOUT

VSSD

C2

CM

VDD

C1

NC

NC

15

16

NC

NC

VSS

R1

R2

VSS

+

-

VDD

VGND

10 µF +100nF

10 µF +100nF

5V

OR

10 µF +100nF

+

-

-

+

2.5 V

2.5 V

VDD

VSS

10 µF +100nF

VGND

Fig. 4: Connection of XE2003D circuit in DIL16 version with gain and offset adjustment

information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice.

The publisher for any consequence of its use will accept no liability. Publication thereof does not convey nor imply any license under patent- or other industrial or

intellectual property rights.

Printed in Switzerland

Date of release: 10 - 00

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