ADATE320 datasheet(59/83 Pages) AD

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ADATE320

Data Sheet

Rev. B | Page 58 of 82

SPI

Address

[Channel]

DAC

Name

Functional (DAC Usage)

Description

DMC_

ENABLE

(Address

0x1A[0])

LOAD_

ENABLE_x

(Address

0x1B[0])

PPMU_

MEAS_VI_x

(Address

0x1C[6])

PPMU_

FORCE_VI_x

(Address

0x1C[5])

PPMU_

RANGE_x

(Address

0x1C[4:2])

0x0E[1]

POL1

PPMU go/no-go MV low level,

Channel 1

0x2E[1]

0x3E[1]

XXX

PPMU go/no-go MI Range A

low level, Channel 1

0x66[1]

0x5E[1]

111

PPMU go/no-go MI Range B

low level, Channel 1

0x67[1]

0x5E[1]

110

PPMU go/no-go MI Range C

low level, Channel 1

0x68[1]

0x5E[1]

101

PPMU go/no-go MI Range D

low level, Channel 1

0x69[1]

0x5E[1]

100

PPMU go/no-go MI Range E

low level, Channel 1

0x6A[1]

0x5E[1]

0XX

0x0F[0]

OVDL

Overvoltage detect low level

0x2F[0]

0x3F[0]

XXX

0x0F[1]

OVDH

Overvoltage detect high level

0x2F[1]

0x3F[1]

XXX

X means don’t care.

M REGISTER C

EXAMPLE: VOL0 (ADDR: 0x07, CH0)

DAC X1 REGISTER

M REGISTER B

M REGISTER A

C REGISTER C

C REGISTER B

C REGISTER A

PIN ELECTRONICS FUNCTIONAL

MODE AND RANGE SETTINGS

EXAMPLE: DMC_ENABLE (ADDR: 0x1A[0])

DAC X2 REGISTER

WRITE

READ

DAC_CAL_ENABLE (ADDR: 0x11[0])

DAC_LOAD (ADDR: 0x11[2])

DAC

SPI

DAC IMMEDIATE

MODE ONE-SHOT

DAC_LOAD_MODE (ADDR: 0x11[1])

n × SCLK

DELAY

1 = DEFERRED

0 = IMMEDIATE

Figure 130. DAC X2 Registers and Calibration Diagram

ADATE320 Datasheet(PDF) 59 Page - Analog Devices

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