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ADATE318BCPZ Datasheet(PDF) 26 Page - Analog Devices |
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ADATE318BCPZ Datasheet(HTML) 26 Page - Analog Devices |
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26 / 81 page  Data Sheet ADATE318 Rev. B | Page 25 of 80 SCLK CS SDI SDO BUSY SEE TABLE 18 CH[1:0] R/W ADDR[6:0] (COULD BE NOP) CH[1:0] ADDR[6:0] 0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 DATA[15:0] = (IF NOP, THEN DON’T CARE) NOTE 1 NOTE 2 NOTE 1 READ OUT DATA[15:0] NOTES 1. IF THE SPI_SDO_HIZ CONTROL BIT (ADDR 0x12 [1]) IS HIGH, THE SDO PIN BECOMES ACTIVE FOLLOWING THE ASSERTION OF CS. IT BECOMES HIGH-Z FOLLOWING RELEASE OF CS. IF THE SPI_SDO_HIZ CONTROL BIT IS LOW, THE SDO PIN REMAINS ACTIVE INDEPENDENT OF CS. 2. THE FIRST 10 BITS OF SDO FOLLOWING A READ REQUEST ECHO ADDRESS AND CHANNEL BITS OF THE PRECEDING REQUEST. THE R/W BIT POSITION IS SET LOW. THE FOLLOWING 16 BITS CONTAIN DATA FROM THE REQUESTED ADDRESS AND CHANNEL. Figure 7. SPI Readout Instruction (Subsequent to Read Request) |
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