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MK3805RI Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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MK3805RI Datasheet(HTML) 1 Page - Integrated Circuit Systems |
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1 / 6 page ![]() MK3805 MDS 3805 B 1 Revision 031104 Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com Buffer/Clock Driver Description The MK3805 is a non-inverting clock driver/buffer providing two independent banks of four outputs each. These buffers have a tri-state output enable input (active low) with 1-input, 5-output configuration per group. The skew between the outputs of the same package is 0.5 ns and the skew between the outputs of different packages is 0.8 ns. The maximum input to output delay is 4.5 ns. Features • Packaged in 20-pin SSOP • Five outputs for each bank with one clock input • Two separate banks of five outputs each • Advanced, low-power, CMOS process • Ten output clocks • Two separate inputs • Industrial temperature range -40°C to +85°C • Hysteresis on all inputs Block Diagram OA0-4 5 OB0-4 5 MON INA OEB INB OEA GND 3 VDD 2 |
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