AD9874EB datasheet(22/40 Pages) AD

22 / 40 page

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AD9874

The mixer’s differential LO port is driven by the LO buffer stage

shown in Figure 6 that can be driven single-ended or differential.

Since it is self-biasing, the LO signal level can be ac-coupled and

range from 0.3 V p-p to 1.0 V p-p with negligible effect on per-

formance. The mixer’s open-collector outputs, MXOP and MXON,

drive an external resonant tank consisting of a differential LC net-

work tuned to the IF of the band-pass

Σ-∆ ADC (i.e., f

IF2_ADC =

fCLK/8). The two inductors provide a dc bias path for the mixer

core via a series resistor of 50

Ω, which is included to dampen the

common-mode response. The mixer’s output must be ac-coupled

to the input of the band-pass

Σ-∆ ADC, IF2P and IF2N, via

two 100 pF capacitors to ensure proper tuning of the LC center

frequency.

The external differential LC tank forms the resonant element

for the first resonator of the band-pass

Σ-∆ modulator, and so

must be tuned to the fCLK/8 center frequency of the modulator.

The inductors should be chosen such that their impedance at

fCLK/8 is about 140

Ω (i.e., L = 180/fCLK). An accuracy of 20% is

considered to be adequate. For example, at fCLK = 18 MHz, L = 10

µH is a good choice. Once the inductors have been selected, the

required tank capacitance may be calculated using the relation

fCLK/8 = 1/{2

(2L

1/2}.

For example, at fCLK = 18 MHz and L = 10

µH, a capacitance of

250 pF is needed. However, in order to accommodate an induc-

tor tolerance of

±10%, the tank capacitance must be adjustable

from 227 pF to 278 pF. Selecting an external capacitor of 180 pF

ensures that even with a 10% tolerance and stray capacitances

as high as 30 pF, the total capacitance will be less than the mini-

mum value needed by the tank. Extra capacitance is supplied by

the AD9874’s on-chip programmable capacitor array. Since the

programming range of the capacitor array is at least 160 pF, the

AD9874 has plenty of range to make up for the tolerances of low

cost external components. Note, if fCLK is increased by a factor of

1.44 MHz to 26 MHz so that fCLK/8 becomes 3.25 MHz, reduc-

ing L and C by approximately the same factor (i.e., L = 6.9

µH

and C = 120 pF), the above stated requirements are satisfied.

The selection of the inductors is an important consideration in

realizing the full linearity performance of the AD9874. This is

especially the case when operating the LNA and mixer at maximum

bias and low clock frequency. Figure 10 shows how the two-tone

input-referred IMD versus the input level performance at an IF of

109 MHz and fCLK of 18 MHz varies between Toko’s FSLM series

and Coilcraft’s 1812CS series inductors. The graph also shows

the extrapolated point of intersection used to determine the IIP3

performance. Note, the Coilcraft inductor provides a 7 dB–8 dB

improvement in performance and closely approximates the 3:1 slope

associated with a third order linearity compared to the 2.65:1

slope associated with the Toko inductor. The Coilcraft 1008CS

series showed similar performance to the 1812CS series. It is worth

noting that the difference in IMD performance between these

two inductor families with an fCLK of 26 MHz is insignificant.

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TOKO INDUCTOR

PIMD = 2.64

PIN + 4.6

FIN = 109.65MHz

COILCRAFT

PIMD = 2.92

PIN + 6.9

Figure 10. IMD Performance between Different Inductors

with LNA and Mixer at Full Bias and fCLK of 18 MHz

Both the LNA and mixer have four programmable bias settings

so that current consumption can be minimized for a given appli-

cation. Figures 11a, 11b, and 11c show how the LNA and mixer’s

noise figure (NF), linearity (IIP3), IF clip point, current consumption,

and frequency response are all affected for a given LNA/mixer

bias setting. The measurements were taken at an IF = 73.35 MHz

and LO = 71.1 MHz with supplies set to 3 V.

1_0

1_1

1_2

1_3

2_0

2_1

2_2

2_3

3_0

3_1

3_2

3_3

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CLIP POINT

NOISE FIGURE

LNA_MIXER BIAS SETTING

Figure 11a. LNA/Mixer Noise Figure and Conversion

Gain vs. Bias Setting

1_0

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1_1

1_2 1_3

2_0 2_1

2_2

2_3 3_0

3_1 3_2

3_3

7.00

8.25

5.75

4.50

3.25

2.00

9.50

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LNA_MIXER CURRENT

IIP3

LNA_MIXER BIAS SETTING

Figure 11b. LNA/Mixer IIP3 and Current Consumption

vs. Bias Setting

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