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AD9670EBZ Datasheet(PDF) 42 Page - Analog Devices |
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AD9670EBZ Datasheet(HTML) 42 Page - Analog Devices |
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42 / 48 page ![]() Data Sheet AD9674 Rev. A | Page 41 of 47 Addr. (Hex) RegisterName Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB) Default Value Comments 0x00D TEST_IO User test mode: 0 = continuous, repeat user patterns (1, 2, 3, 4, 1, 2, 3, 4, …) (default), 1 = single clock cycle user patterns, then zeros (1, 2, 3, 4, 0, 0, …) X Reset PN long gen 0 = on, PN long running (default), 1 = off, PN long held in reset Reset PN short gen: 0 = on, PN short running (default), 1 = off, PN short held in reset Output test mode: 0000 = off (default), 0001 = midscale short, 0010 = positive full-scale short, 0011 = negative full-scale short, 0100 = checkerboard output, 0101 = PN sequence long, 0110 = PN sequence short, 0111 = one-word/zero-word toggle, 1000 = user input, 1001:1110 = reserved, 1111 = ramp output (see Table 16) 0x00 When register is set, the test data is placed on the output pins in place of normal data (local). 0x00E GPO X X X X GPO3 output: 0 = low (default); 1 = high GPO2 output: 0 = low (default); 1 = high GPO1 output: 0 = low (default): 1 = high GPO0 output: 0 = low (default); 1 = high 0x00 Values placed on GPOx pins (global). 0x00F FLEX_CHANNEL _INPUT Filter cutoff frequency control: 00000 = 1.45 × (1/3) × fSAMPLE, 00001 = 1.25 × (1/3) × fSAMPLE, 00010 = 1.13 × (1/3) × fSAMPLE, 00011 = 1.0 × (1/3) × fSAMPLE (default), 00100 = 0.9 × (1/3) × fSAMPLE, 00101 = 0.8 × (1/3) × fSAMPLE, 00110 = 0.75 × (1/3) × fSAMPLE, 00111 = reserved, 01000 = 1.45 × (1/4.5) × fSAMPLE, 01001 = 1.25 × (1/4.5) × fSAMPLE, 01010 = 1.13 × (1/4.5) × fSAMPLE, 01011 = 1.0 × (1/4.5) × fSAMPLE, 01100 = 0.9 × (1/4.5) × fSAMPLE, 01101 = 0.8 × (1/4.5) × fSAMPLE, 01110 = 0.75 × (1/4.5) × fSAMPLE, 01111 = reserved, 10000 = 1.45 × (1/6) × fSAMPLE, 10001 = 1.25 × (1/6) × fSAMPLE, 10010 = 1.13 × (1/6) × fSAMPLE, 10011 = 1.0 × (1/6) × fSAMPLE, 10100 = 0.9 × (1/6) × fSAMPLE, 10101 = 0.8 × (1/6) × fSAMPLE, 10110 = 0.75 × (1/6) × fSAMPLE, 1 0111 = reserved Band mode: 0 = low (default, 8 MHz to 18 MHz), 1 = high (13.5 MHz to 30 MHz) X X 0x18 Antialiasing filter cutoff (global). 0x010 FLEX_OFFSET X X 1 0 0 0 0 0 0x20 Reserved. 0x011 FLEX_GAIN Digital VGA gain control: 0000 = GAIN± pins enabled (default), 0001 = 0.0 dB (maximum gain, GAIN± pins disabled), 0010 = −3.5 dB, 0011 = −7.0 dB, …., 1110 = 45 dB 1111 = 45 dB PGA gain: 00 = 21 dB, 01 = 24 dB (default), 10 = 27 dB, 11 = 30 dB LNA gain: 00 = 15.6 dB, 01 = 17.9 dB, 10 = 21.6 dB (default) 0x06 LNA and PGA gain adjustment (global). 0x012 BIAS_CURRENT X X X X 1 PGA bias: 0 = 100% (default), 1 = 60% LNA bias: 00 = high, 01 = midhigh (default), 10 = midlow, 11 = low 0x09 LNA bias current adjustment (global). 0x013 RESERVED_13 0 0 0 0 0 0 0 0 0x00 Reserved. 0x014 OUTPUT_MODE X X X Output data enable: 0= enable (default), 1 = disable X Output data invert: 0=disable (default), 1=enable Output data format: 00 = offset binary, 01 = twos complement (default), 10 = gray code, 11 = reserved 0x01 Data output modes (local). 0x015 OUTPUT_ADJUST LVDS output standard: 0 = ANSI-644 (default), 1 = IEEE 1596.3 (low power) 1 1 0 LVDS drive strength enable: 0=disable (default), 1=enable LVDS drive current: 000 = 3.72 mA, 001 = 3.5 mA (default), 010 = 3.30 mA, 011 = 2.96 mA, 100 = 2.82 mA, 101 = 2.57 mA, 110 = 2.27 mA, 111 = 2.0 mA (reduced range) 0x61 Data output levels (global). |
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