ADUCM310 datasheet(26/28 Pages) AD

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Data Sheet

ADuCM310

Rev. B Page 25 of 27

RECOMMENDED CIRCUIT AND COMPONENT VALUES

Figure 24 shows a typical connection diagram for the

ADuCM310.

There are four digital supply balls: IOVDD1, IOVDD2,

IOVDD3, and DVDD. Decouple these balls with a 0.1 µF

capacitor placed as close as possible to each of the four balls and a

10 µF capacitor at the supply source. Similarly, the analog supply

pins, AVDD3 and AVDD4, each require a 0.1 µF capacitor

placed as close as possible to each ball with a 10 µF capacitor at

the supply source.

The IDACs source their output currents from the PVDD supply

balls, PVDD_IDACx. Connect a 100 nF capacitor close to each

PVDD supply ball. Place at least one 10 µF capacitor at the

source of the PVDD supply (PVDD_IDACx balls).

The IDAC output filters depend on a 10 nF capacitor placed

between the CDAMP_IDACx ball and the PVDD_IDACx ball.

The ADC reference requires a 4.7 µF capacitor between the

ADC_CAPN and ADC_CAPP balls. Directly connect

ADC_CAPN to the analog ground (AGND).

The ADuCM310 contains four internal regulators. These regulators

require external decoupling capacitors. The DVDD_REG1 and

DVDD_REG2 balls each requires a 0.47 µF capacitor to the

digital ground (DGND). The AVDD_REG1 and AVDD_REG2

balls each requires a decoupling capacitor to the AGND.

To generate an accurate and low drift reference current, connect the

IREF ball to the analog ground via a low parts per million

(ppm) 3.16 kΩ resistor.

Connect the VREF_1.2 ball to AGND via a 0.47 µF capacitor.

See Figure 24 for more details.

ADUCM310 Datasheet(PDF) 26 Page - Analog Devices