Data Sheet Rev. 1.4

3

2001-10-18

TLE 4290

Figure 2

Pin Configuration (top view)

Pin Definitions and Functions

Pin No. Symbol Function

1I

Input; block to ground directly at the IC with a ceramic capacitor.

2PG

Power Good; open collector output. Add a pull up resistor of > 5 k

Ω

to pin Q.

3GND

Ground; Pin 3 internally connected to heatsink.

4D

Delay; connect a capacitor to GND for setting power good delay

time.

5Q

Output; block to ground with a capacitor,

C

≥ 22 µF

ESR < 5

Ω at 10 kHz.

AEP02827

I

PG

Q

D

GND

AEP02826

GND

PG

I

Q

D

AEP02825

PG

D Q

I

GND

P-TO252-5-1 (D-PAK)

P-TO263-5-1 (SMD)

P-TO220-5-11