SLG46531 datasheet(92/170 Pages) DIALOG

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SLG46531_DS_109

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SLG46531

10.4 ACMP1 Register Settings

Table 84. ACMP1 Register Settings

Signal Function

Address

ACMP1 100uA

Current Source

Enable

reg<1183>

0: Disable

1: Enable

ACMP1 Positive

Input Source Select

PIN10

reg<1168>

0: Disable

1: Enable

ACMP1 Analog

Buffer Enable (max.

band width 1 MHz)

reg<1169>

0: Disable analog buffer

1: Enable analog buffer

ACMP1 Hysteresis

Enable

reg<1171:1170> 00: Disabled (0 mV)

01: Enabled (25 mV)

10: Enabled (50 mV)

11: Enabled (200 mV)

(01: for both external & internal VREF; 10 & 11: for only internal VREF; External VREF

will not have 50mV & 200mV hysteresis.)

ACMP1 Wake &

Sleep function

Enable

reg<1491>

0: Disable

1: Enable

ACMP1 In Voltage

Select

reg<1636:1632>

00000: 50 mV

00001: 100 mV

00010: 150 mV

00011: 200 mV

00100: 250 mV

00101: 300 mV

00110: 350 mV

00111: 400 mV

01000: 450 mV

01001: 500 mV

01010: 550 mV

01011: 600 mV

01100: 650 mV

01101: 700 mV

01110: 750 mV

01111: 800 mV

10000: 850 mV

10001: 900 mV

10010: 950 mV

10011: 1 V

10100: 1.05 V

10101: 1.1 V

10110: 1.15 V

10111: 1.2 V

11000: VDD/3

11001: VDD/4

11010: EXT_VREF(PIN12)

11011: EXT_VREF(PIN12)

11100: EXT_VREF(PIN12)/2

11101: EXT_VREF(PIN12)/2

ACMP1 Positive

Input Divider

reg<1638:1637> 00: 1.00X

01: 0.50X

10: 0.33X

11: 0.25X

ACMP1 Low

Bandwidth (Max: 1

MHz) Enable

reg<1639>

0: Off

1: On

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