OP270GSZ datasheet(18/21 Pages) AD

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Data Sheet

OP270

Rev. F | Page 17 of 20

DIGITAL PANNING CONTROL

Figure 44 uses a DAC8221 (a dual 12-bit CMOS DAC) to pan a

signal between two channels. One channel is formed by the

current output of DAC A driving one-half of an OP270 in a

current-to-voltage converter configuration. The other channel

is formed by the complementary output current of DAC A,

which normally flows to ground through the AGND pin. This

complementary current is converted to a voltage by the other

half of the OP270, which also holds AGND at virtual ground.

Gain error due to mismatching between the internal DAC

ladder resistors and the current-to-voltage feedback resistors is

eliminated by using feedback resistors internal to the DAC8221.

Only DAC A passes a signal; DAC B provides the second

feedback resistor. With VREFB unconnected, the current-to-

voltage converter, using RFBB, is accurate and not influenced by

digital data reaching DAC B. Distortion of the digital panning

control is less than 0.002% over the 20 Hz to 20 kHz audio

range. Figure 45 shows the complementary outputs for a 1 kHz

input signal and a digital ramp applied to the DAC data input.

DUAL PROGRAMMABLE GAIN AMPLIFIER

The dual OP270 and the DAC8221 (a dual 12-bit CMOS DAC)

can be combined to form a space-saving, dual programmable

amplifier. The digital code present at the DAC, which is easily

set by a microprocessor, determines the ratio between the internal

feedback resistor and the resistance that the DAC ladder presents

to the op amp feedback loop. Gain of each amplifier is

4096





where n is the decimal equivalent of the 12-bit digital code

present at the DAC.

If the digital code present at the DAC consists of all 0s, the

feedback loop opens, causing the op amp output to saturate. A

20 MΩ resistor placed in parallel with the DAC feedback loop

eliminates this problem with only a very small reduction in gain

accuracy.

1/2

OP270GP

VIN

RFBA

WRITE

CONTROL

VDD

DAC8221P

0.01µF

+15V

–15V

OUT

IOUTA

IOUTB

AGND

DGND

1/2

OP270GP

DAC B

DAC A

+5V

10µF

–

10µF

–

0.1µF

RFBB

VREFA

VREFB

DAC A/DAC B

DAC DATA BUS

PINS 6 (MSB) TO 17 (LSB)

OUT

Figure 44. Digital Panning Control

1ms

A OUT

Figure 45. Digital Panning Control Output

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