VRE3021 datasheet(5/8 Pages) ETC

5 / 8 page

VRE3021DS REV. D JULY 2000

THEORY OF OPERATION

The following discussion refers to the schematic in

figure 2 below. A FET current source is used to bias a

6.3V zener diode. The zener voltage is divided by the

resistor network R1 and R2. This voltage is then applied

to the noninverting input of the operational amplifier which

amplifies the voltage to produce a 2.048V output. The

gain is determined by the resistor networks R3 and R4:

G=1 + R4/R3. The 6.3V zener diode is used because it is

the most stable diode over time and temperature.

The current source provides a closely regulated zener

current, which determines the slope of the references’

voltage vs. temperature function. By trimming the zener

current a lower drift over temperature can be achieved.

But since the voltage vs. temperature function is nonlinear

this compensation technique is not well suited for wide

temperature ranges.

Thaler

Corporation

has

developed

nonlinear

compensation network of thermistors and resistors that is

used

the

VRE

series

voltage

references.

This

proprietary network eliminates most of the nonlinearity in

the voltage vs. temperature function. By adjusting the

slope, Thaler Corporation produces a very stable voltage

over wide temperature ranges.

This network is less than 2% of the overall network

resistance so it has a negligible effect on long term

stability.

Figure 3 shows the proper connection of the

VRE3021 series voltage references with the optional trim

resistor for initial error and the optional capacitor for noise

reduction.

BASIC CIRCUIT CONNECTION

Figure 3 shows the proper connection of the VRE3025

voltage reference with the optional trim resistor for initial

error and optional capacitor for noise reduction.

To achieve the specified performance, pay careful

attention to the layout. A low resistance star configuration

will reduce voltage errors, noise pickup, and noise

coupled from the power supply.

Commons should be

connected to a single point to minimize interconnect

resistances.

Figure 3 External Connections

Figure 2 Functional Block Diagram

Noise Reduction

Voltage reference output

OUT

External trim input. Leave open if

not used.

TRIM

Ground

GND

Positive power supply input

Internally connected. Do not use

Vin

N.C.

1,3,7

PIN DESCRIPTION

+ V

OUT

+ V

VRE3021

10k

Ω

N 1µF

Optional Noise

Reduction

Capacitor

Optional Fine

Trim Adjustment

VRE3021 Datasheet(PDF) 5 Page - List of Unclassifed Manufacturers

VRE3021 Datasheet(HTML) 5 Page - List of Unclassifed Manufacturers

Html Pages

1 2 3 4 5 6 7 8

Datasheet Download

Link URL