© VITESSE SEMICONDUCTOR CORPORATION

Page 1

3/4/99

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

VITESSE

SEMICONDUCTOR CORPORATION

Datasheet

VSC7126

1.0625 Gbits/sec Fibre

Channel Transceiver

G52148-0, Rev. 4.3

Features

General Description

The VSC7126 is a full-speed Fibre Channel Transceiver optimized for Host Adapter and other space- con-

strained applications. It accepts two 10-bit 8B/10B encoded transmit characters, latches them on the rising edge

of TBC and serializes the data onto the TX+/- PECL differential outputs at a baud rate which is twenty times the

TBC frequency. It also samples serial receive data on the RX+/- PECL differential inputs, recovers the clock

and data, deserializes it onto two 10-bit receive characters, outputs a recovered clocks at one twentieth of the

incoming baud rate and detects Fibre Channel “Comma” characters. The VSC7126 contains on-chip PLL cir-

cuitry for synthesis of the baud-rate transmit clock, and extraction of the clock from the received serial stream.

These circuits are fully monolithic and require no external components.

VSC7126 Block Diagram

• ANSI X3T11 Fibre Channel Compatible 1.0625

Gbps Full-duplex Transceiver

• GLM Compatible (FCSI-301-Rev 1.0)

• 20 Bit TTL Interface For Transmit And Receive Data

• Monolithic Clock Synthesis And Clock Recovery -

No External Components

• 53.125 MHz TTL Reference Clock

• Automatic Lock-to-Reference Function

• Suitable For Both Copper And Fiber

Optical Link Applications

• Low Power Operation - 850 mW

• 80 Pin, 14x14 mm PQFP

• Single +3.3V Power Supply

RX+

RX-

Q D

Serial to

Parallel

Clock

Recovery

Retimed

Data

Recovered

Comma

Detect

Q D

R0:19

Frame

Logic

COM_DET

EN_CDET

T0:19

PLL Clock

Multiply (x20)

D Q

Parallel

to Serial

Serial Data

Clock

Synthesized

Clock

D Q

TX+

TX-

EWRAP

÷ 20

RBC(0)

20

20

TBC

2:1

RBC(1)

TXEN#

L_UNUSE

53.125 MHz

53.125 MHz