Preliminary Technical Data

AD7760

Rev. PrN | Page 21 of 22

Table 14. Status Register (Read Only)

MSB

LSB

PART

1

PART

0

DIE

2

DIE

1

DIE

0

DVALID

LPWR

OVR

DL

OK

Filter

OK

U

Filter

BYP F3

BYP F1

DEC2

DEC1

DEC0

Bit

Mnemonic

Comment

15,14

PART1:0

Part Number. These bits will be constant for the AD7760.

13-11

DIE2:0

Die Number. These bits will reflect the current AD7760 die number for identification purposes within a system.

10

DVALID

Data Valid. This bit corresponds to the DVALID bit in the status word output in the second 16-bit read operation.

9

LPWR

Low Power. If the AD7760 is operating in Low Power Mode, this bit is set to a 1.

8

OVR

If the current analog input exceeds the current overrange threshold, this bit will be set.

7

DL OK

When downloading a user filter to the AD7760, a checksum is generated. This checksum is compared to the one

downloaded following the coefficients. If these checksums agree, this bit is set.

6

Filter OK

When a user-defined filter is in use, a checksum is generated when the filter coefficients pass through the filter. This

generated checksum is compared to the one downloaded. If they match, this bit is set.

5

U Filter

If a user-defined filter is in use, this bit is set.

4

BYP F3

Bypass Filter 3. If Filter 3 is bypassed by setting the relevant bit in Control Register 1, this bit is also set.

3

BYP F1

Bypass Filter 1. If Filter 1 is bypassed by setting the relevant bit in Control Register 1, this bit is also set.

2-0

DEC2:0

Decimation Rate. These correspond to the bits set in Control Register 1.

.

NON BIT-MAPPED REGISTERS

Offset Register (Address 0x0003, Default Value 0x0000)

The Offset Register uses 2’s Complement notation and is scaled such that 0x7FFF (maximum positive value) and 0x8000 (maximum

negative value) correspond to an offset of +0.78125% and -0.78125% respectively. Offset correction is applied after any gain correction.

Using the default gain value of 1.25 and assuming a reference voltage of 4.096V, the offset correction range is approximately ±25mV.

Gain Register (Address 0x0004, Default Value 0xA000)

The Gain Register is scaled such that 0x8000 corresponds to a gain of 1.0. The default value of this register is 1.25 (0xA000). This gives a

Over Range Register (Address 0x0005, Default Value 0xCCCC)

The Over Range register value is compared with the output of the first decimation filter to obtain an overload indication with minimum

approximately 6.55v pk-pk differential. Note that the over-range bit is also set immediately if the analog input voltage exceeds 100% of