PCI6620 datasheet(30/160 Pages) TI

30 / 160 page

2–14

Table 2–9. Multifunction and Miscellaneous Terminals

TERMINAL

I/O

DESCRIPTION

NAME

NUMBER

I/O

DESCRIPTION

CLK_48

L02

Reserved for future 48-MHz clock terminal

MFUNC0

M03

I/O

Multifunction terminal 0. See Section 4.36, Multifunction Routing Status Register, for configuration

details.

MFUNC1

L06

I/O

Multifunction terminal 1. See Section 4.36, Multifunction Routing Status Register, for configuration

details.

MFUNC2

N01

I/O

Multifunction terminal 2. See Section 4.36, Multifunction Routing Status Register, for configuration

details.

MFUNC3

N02

I/O

Multifunction terminal 3. See Section 4.36, Multifunction Routing Status Register, for configuration

details.

MFUNC4

N03

I/O

Multifunction terminal 4. See Section 4.36, Multifunction Routing Status Register, for configuration

details.

MFUNC5

M05

I/O

Multifunction terminal 5. See Section 4.36, Multifunction Routing Status Register, for configuration

details.

MFUNC6

P01

I/O

Multifunction terminal 6. See Section 4.36, Multifunction Routing Status Register, for configuration

details.

PHY_TEST_MA

R17

PHY test pin. Not for customer use. It must be pulled high with a 4.7-k

Ω resistor.

RI_OUT/PME

R03

Ring indicate out and power management event output. This terminal provides an output for

ring-indicate or PME signals.

RSVD

H05, J05,

J06, K01,

K02, K03

Reserved. These terminals have no connection anywhere within the package.

SCL

K07

I/O

Serial clock. At PRST, the SCL signal is sampled to determine if a two-wire serial ROM is present. If

the serial ROM is detected, then this terminal provides the serial clock signaling and is implemented

as open-drain. For normal operation (a ROM is implemented in the design), this terminal must be pulled

high to the ROM VDD with a 2.7-kΩ resistor. Otherwise, it must be pulled low to ground with a 220-Ω

resistor.

SDA

L03

I/O

Serial data. This terminal is implemented as open-drain, and for normal operation (a ROM is

implemented in the design), this terminal must be pulled high to the ROM VDD with a 2.7-kΩ resistor.

Otherwise, it must be pulled low to ground with a 220-

Ω resistor.

SPKROUT

L07

Speaker output. SPKROUT is the output to the host system that can carry SPKR or CAUDIO through

the PCI6x20 device from the PC Card interface. SPKROUT is driven as the exclusive-OR combination

of card SPKR//CAUDIO inputs.

SUSPEND

P02

Suspend. SUSPEND protects the internal registers from clearing when the GRST or PRST signal is

asserted. See Section 3.9.5, Suspend Mode, for details.

TEST0

R19

I/O

Terminal TEST0 is used for factory test of the device and must be connected to ground for normal

operation.

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