MB90F543GPF datasheet(9/70 Pages) CYPRESS

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Document Number: 002- 07696 Rev. *A

Page 9 of 70

MB90540G/545G Series

3. Pin Description

(Continued)

Pin No.

Pin name

Circuit type

Function

LQFP*2

QFP*1

(Oscillation)

High speed crystal oscillator input pins

X0A

(Oscillation)

Low speed crystal oscillator input pins. For the one clock system parts,

perfom external pull-down processing.

X1A

Low speed crystal oscillator input pins. For the one clock system parts, leave

it open.

RST

External reset request input pin

HST

Hardware standby input pin

83 to 90

85 to 92

P00 to P07

General I/O port with programmable pullup. This function is enabled in the

single-chip mode.

AD00 to AD07

I/O pins for 8 lower bits of the external address/data bus. This function is

enabled when the external bus is enabled.

91 to 98

93 to 100

P10 to P17

General I/O port with programmable pullup. This function is enabled in the

single-chip mode.

AD08 to AD15

I/O pins for 8 higher bits of the external address/data bus. This function is

enabled when the external bus is enabled.

99 to 6

1 to 8

P20 to P27

General I/O port with programmable pullup. In external bus mode, this

function is valid when the corresponding bits in the external address output

control resister (HACR) are set to “1”.

A16 to A23

8-bit I/O pins for A16 to A23 at the external address/data bus. In external bus

mode, this function is valid when the corresponding bits in the external

address output control resister (HACR) are set to “0”.

P30

General I/O port with programmable pullup. This function is enabled in the

single-chip mode.

ALE

Address latch enable output pin. This function is enabled when the external

bus is enabled.

810

P31

General I/O port with programmable pullup. This function is enabled in the

single-chip mode.

Read strobe output pin for the data bus. This function is enabled when the

external bus is enabled.

P32

General I/O port with programmable pullup. This function is enabled in the

single-chip mode or when the WR/WRL pin output is disabled.

WRL

Write strobe output pin for the data bus. This function is enabled when both

the external bus and the WR/WRL pin output are enabled. WRL is write-

strobe output pin for the lower 8 bits of the data bus in 16-bit access. WR is

write-strobe output pin for the 8 bits of the data bus in 8-bit access.

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