MB90598GPF datasheet(35/52 Pages) CYPRESS

35 / 52 page

Document Number: 002-07700 Rev. *B

Page 35 of 52

MB90595G Series

(Continued)

(VCC

 5.0 V10%, VSS  AVSS  0.0 V, TA  40 C to 85 C)

* : The power supply current testing conditions are when using the external clock.

11.4 AC Characteristics

11.4.1 Clock Timing

(VCC

 5.0 V10%, VSS  AVSS  0.0 V, TA  40 C to 85 C)

*: Frequency deviation indicates the maximum frequency difference from the target frequency when using a multiplied clock.

Parameter

Symbol

Pin name

Condition

Value

Unit

Remarks

Min

Typ

Max

Input capacity

CIN

Other than C, AVCC, AVSS,

AVRH, AVRL, VCC, VSS,

DVCC, DVSS, P70 to P87

——

P70 to P87

—

Pull-up

resistance

RUP

RST

—

100



Pull-down

resistance

RDOWN

MD2

—

100



Parameter

Symbol

Pin name

Value

Unit

Remarks

Min

Typ

Max

Oscillation frequency

X0, X1

—

MHz

When using oscillation circuit

Oscillation cycle time

tCYL

X0, X1

200

—

333

When using oscillation circuit

External clock frequency

X0, X1

—

MHz

When using external clock

External clock cycle time

tCYL

X0, X1

62.5

—

333

When using external clock

Frequency deviation with PLL *

f—

—

Input clock pulse width

PWH, PWL

—

Duty ratio is about 30 to 70%.

Input clock rise and fall time

tCR, tCF

—

When using external clock

Machine clock frequency

fCP

—1.5

—

MHz

Machine clock cycle time

tCP

—

62.5

—

666

Flash Read cycle time

tCYL

——

2*tCP

—ns

When Flash is accessed via

CPU



Central frequency fO



f



------ 100%



tCYL

PWH

tCF

PWL

tCR

0.8 VCC

0.2 VCC

•Clock Timing

MB90598GPF Datasheet(PDF) 35 Page - Cypress Semiconductor

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