5812-DS00-R datasheet(10/84 Pages) BOARDCOM

10 / 84 page

BCM5812

Advance Data Sheet

3/11/03

B roa dcom Co rpo rat ion

Page 2

Programming Interface

Document

5812-DS01-405-R

host software can sense the MCR1_FULL and MCR2_FULL flags in the DMA Status CSR, bits 30 and 27 respectively.

These flags are zero when their respective MCR FIFO can accommodate at least one new MCR address.

Figure 2: BCM5812 Programming Overview

Each packet descriptor entry is 32 bytes long, and contains a pointer to a command context structure along with initial input

and output fragment chain entries. The chain entry structures are buffer descriptors used to support input and output scatter-

gather operations. Each provides the address and length, in bytes, of a buffer fragment, and a pointer to a next fragment

chain entry. The packet descriptor also supplies the total length of the input. Figure 4 on page 4 diagrams the format of a

packet descriptor.

The command context indicates the actual operation to be performed. The first 32-bit word is common to all command

context types, and indicates the operation to be performed and the total length of the command context structure itself, in

Table 1: MCR Header Word (Input)

Bits

Description

Suppress Interrupts

30:16

Reserved

15:0

Number of Packets

MCR

Host Memory

MCR1@

PCI Memory Space

DMA Control

DMA Status

MCR2@

DMA Error

CSR

Device ID

PCI Configuration Space

Vendor ID

Memory BAR0

PCI Bus DMA

Command Context

Data Buffers

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