SiC437, SiC438

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Vishay Siliconix

S18-0030-Rev. B, 15-Jan-18

19

Document Number: 75921

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

Step 5: Signal Routing

1. Separate the small analog signal from high current path.

As shown above, the high paths with high dv/dt, di/dt are

placed on the left side of the IC, while the small control

signals are placed on the right side of the IC. All the

components for small analog signal should be placed

closer to IC with minimum trace length

2. Pin16 is considered as IC analog ground, which should

quite and improve noise immunity

3. The output signal can be routed through inner layer.

shielded by an inner ground layer



Step 6: Thermal Management

pads to utilize inner layers for high current and thermal

dissipation

2. To achieve better thermal performance, additional vias

maximize the power dissipation capability from PCB

vias on this pad

4. 8 mil drill for pads and 10 mils drill for plane can be the

optional via size. The vias on pad may drain solder

during assembly and cause assembly issue. Please

consult with the assembly house for guideline



Step 7: Ground Connection

1. In order to minimize the ground voltage drop due to high

current, it is recommended to put vias on the both side

layers to lower the impedance



Step 7: Ground Layer

1. It is recommended to make the whole inner 1 layer (next to top

layer) ground plane

2. This ground plane provides shielding between noise source

on top layer and signal trace within inner layer

3. The Ground plane can be broken into two section as

PGND

AGND

plane

V

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u

t

s

i

g

n

a

l

VIN Plane

PGND Plane

VSWH

Vias

Vias

PGND Plane

AGND Plane