CS5345

25

will clock out the MSB of the addressed register (CDOUT will leave the high impedance state). If the MAP auto in-

crement bit is set to 1, the data for successive registers will appear consecutively.

4.7.2

I²C Mode

In I²C mode, SDA is a bidirectional data line. Data is clocked into and out of the part by the clock, SCL. There is no

CS pin. Pins AD0 and AD1 form the two least significant bits of the chip address and should be connected through

a resistor to VLC or DGND as desired. The state of the pins is sensed while the CS5345 is being reset.

The signal timings for a read and write cycle are shown in Figure 11 and Figure 12. A Start condition is defined as

a falling transition of SDA while the clock is high. A Stop condition is a rising transition while the clock is high. All

other transitions of SDA occur while the clock is low. The first byte sent to the CS5345 after a Start condition consists

of a 7 bit chip address field and a R/W bit (high for a read, low for a write). The upper 5 bits of the 7-bit address field

are fixed at 10011. To communicate with a CS5345, the chip address field, which is the first byte sent to the CS5345,

should match 10011 followed by the settings of the AD1 and AD0. The eighth bit of the address is the R/W bit. If the

operation is a write, the next byte is the Memory Address Pointer (MAP) which selects the register to be read or

written. If the operation is a read, the contents of the register pointed to by the MAP will be output. Setting the auto

increment bit in MAP allows successive reads or writes of consecutive registers. Each byte is separated by an ac-

knowledge bit. The ACK bit is output from the CS5345 after each input byte is read, and is input to the CS5345 from

the microcontroller after each transmitted byte.

MA P

MSB

LSB

DATA

byte 1

byte n

R/W

R/W

A DDRE S S

CH IP

ADDRESS

CHIP

CDIN

CCL K

CS

CD O U T

MSB

LSB MSB

LSB

1001111

1001111

MAP = Memory Address Pointer, 8 bits, MSB first

High Impedance

Figure 10. Control Port Timing in SPI Mode

4

5

6

7

24 25

SCL

CHIP ADDRESS (WRITE)

MAP BYTE

DATA

DATA +1

START

ACK

STOP

ACK

ACK

ACK

1

0

0

1

1 AD1 AD0 0

SDA

INCR

6

5

4

3

2

1

0

7

6

1

0

7

6

1

0

7

6

1

0

0

1

2

3

8

9

12

16 17 18

19

10 11

13 14 15

27 28

26

DATA +n

Figure 11. Control Port Timing, I²C Write