MPQ4431

– 36V, 1A, LOW IQ, SYNC, STEP-DOWN CONVERTER, AEC-Q100

MPQ4431 Rev. 1.0

www.MonolithicPower.com

16

3/21/2017

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OPERATION

The

MPQ4431

is

a

high-frequency,

synchronous, rectified, step-down, switch-mode

converter with integrated, internal, high-side

and low-side power MOSFETs. The MPQ4431

offers a very compact solution that achieves 1A

of continuous output current with excellent load

and line regulation over a wide 3.3V to 36V

input supply range.

The MPQ4431 features a switching frequency

programmable

from

350kHz

to

2.5MHz,

external soft start, power good indication, and

precision current limit. Its very low operational

quiescent current makes it suitable for battery-

powered applications.

Pulse-Width Modulation (PWM) Control

At

moderate

to

high

output

current,

the

MPQ4431 operates in a fixed-frequency, peak-

current-control mode to regulate the output

voltage. An internal clock initiates a pulse-width

modulation (PWM) cycle. At the rising edge of

the clock, the high-side power MOSFET (HS-

FET) is turned on, and the inductor current rises

linearly to provide energy to the load. The HS-

FET remains on until its current reaches the

is the output of the internal error amplifier. If the

one PWM period, the HS-FET remains on,

saving a turn-off operation.

When the HS-FET is off, it remains off until the

next clock cycle begins. The low-side MOSFET

(LS-FET) is turned on immediately while the

inductor current flows through it.

To prevent shoot-through, a dead time is

inserted to prevent the HS-FET and LS-FET

from being on at the same time. For each turn-

on and -off in a switching cycle, the HS-FET

turns on or off with a minimum on and off time

limit.

Forced CCM and AAM

The

MPQ4431

has

selectable

forced

continuous

conduction

mode

(CCM)

and

advanced asynchronous mode (AAM) (see

Figure

3).

Driving

SYNC

higher

than

its

specified threshold before the chip starts up

forces the device into CCM with a fixed

frequency, regardless of the output load current.

Connect SYNC to VCC if there is no additional

power supply available to pull SYNC high

before the chip starts up.

Once the device is in CCM, the pull-up at SYNC

can be removed, and SYNC can be used to

synchronize switching. The advantage of CCM

is the controllable frequency and smaller output

ripple, but it also has low efficiency at light load.

Driving SYNC below its specified threshold or

leaving SYNC floating before the chip starts up

enables AAM power-save mode. The MPQ4431

first enters non-synchronous operation for as

long as the inductor current approaches zero at

light load. If the load is further decreased or is

sleep

mode,

which

consumes

very

low

quiescent current to further improve light-load

efficiency.

In sleep mode, the internal clock is blocked first,

so the MPQ4431 skips some pulses. Since the

clock is reset and the crossover time is taken as

the benchmark of the next clock. This control

scheme helps achieve high efficiency by scaling

down the frequency to reduce the switching and

gate driver losses during light-load or no-load

conditions.

When the output current increases from light-

switching frequency increases. If the DC value

resumes discontinuous conduction mode (DCM)

or CCM, which have a constant switching

frequency.

Forced CCM

Inductor

Current

t

t

t

Load

Decreased

AAM

Inductor

Current

t

t

t

Load

Decreased

Figure 3: Forced CCM and AAM