MP4420 – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER

MP4420 Rev.1.0

www.MonolithicPower.com

16

8/5/2014

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

© 2014 MPS. All Rights Reserved.

APPLICATION INFORMATION

Setting the Output Voltage

The external resistor divider sets the output

voltage (see Typical Application on page 1). The

feedback resistor R1 also sets the feedback loop

bandwidth

with

the

internal

compensation

capacitor. Choose R1 around 40kΩ. R2 is then

given by:

1

0.792V

V

R1

R2

OUT

−

=

The T-type network—as shown in Figure 4—is

Figure 4: T-Type Network

RT+R1 is used to set the loop bandwidth.

Basically, higher RT+R1, lower bandwidth. To

ensure

the

loop

stability,

it

is

strongly

recommended to limit the bandwidth lower than

40kHz based on the 410kHz default fsw. Table 1

lists the recommended T-type resistors value for

common output voltages.

Table 1: Resistor Selection for Common Output

Voltages

R1 (kΩ)

R2 (kΩ)

RT (kΩ)

3.3

41.2 (1%)

13 (1%)

51 (1%)

5

41.2 (1%)

7.68 (1%)

51 (1%)

Selecting the Inductor

Use a1µH-to-10µH inductor with a DC current

rating of at least 25% percent higher than the

maximum load current for most applications. For

highest efficiency, an inductor with small DC

resistance is recommended. For most designs,

the inductance value can be derived from the

following equation.

OUT

IN

OUT

1

IN

L

OSC

V(V

V

)

L

VI

f

×−

=

×Δ ×

Choose the inductor ripple current to be

approximately 30% of the maximum load current.

The maximum inductor peak current is:

2

I

I

I

L

LOAD

)

MAX

(

L

Δ

+

=

Use a larger inductor for improved efficiency

under light-load conditions—below 100mA.

VIN UVLO Setting

MP4420 has internal fix under voltage lock out

(UVLO) threshold: rising threshold is 3.5V while

falling threshold is about 3.3V. For the application

needs higher UVLO point, external resistor

divider between EN and IN as shown in figure 4

can be used to get higher equivalent UVLO

threshold.

VIN

EN

IN

R5

500k

R6

Figure 5: Adjustable UVLO using EN divider

The UVLO threshold can be computed from

below two equations:

EN_RISING

RISING

V

500k//R6

R5

(1

INUV

×

+

=

)

EN_FALLING

FALLING

V

500k//R6

R5

(1

INUV

×

+

=

)

When choose R5, make sure it is big enough to

limit the current flows into EN pin lower than

150uA.