The Smart Timing Choice



The Smart Timing Choice



SiTime Corporation

990 Almanor Avenue, Sunnyvale, CA 94085

(408) 328-4400

www.sitime.com

Rev. 1.0

Revised May 14, 2015

SiT2002B

High Frequency, Single Chip, One-output Clock Generator

Features

Applications



Any frequency between 115 MHz to 137 MHz accurate to 6 decimal

places of accuracy



GEPON, network switches, routers, servers, embedded

systems, industrial and medical devices



Operating temperature from -40°C to 85°C. Refer to SiT2019 for

-40°C to 125°C and SiT2021 for -55°C to 125°C options



Ethernet, PCI-E, DDR, etc.



Excellent total frequency stability as low as ±20 PPM



Low power consumption of 4.9 mA typical at 1.8V



LVCMOS/LVTTL compatible output



5-pin SOT23-5: 2.9mm x 2.8mm



RoHS and REACH compliant, Pb-free, Halogen-free and

Antimony-free



For AEC-Q100 oscillators, refer to SiT2024 and SiT2025

Electrical Specifications

Table 1. Electrical Characteristics

All Min and Max limits are specified over temperature and rated operating voltage with 15 pF output load unless otherwise stated. Typical values

are at 25°C and nominal supply voltage.

Parameters

Symbol

Min.

Typ.

Max.

Unit

Condition

Frequency Range

Output Frequency Range

f

115

–

137

MHz

Frequency Stability and Aging

Frequency Stability

F_stab

-20

–

+20

PPM

Inclusive of Initial tolerance at 25°C, 1st year aging at 25°C, and

variations over operating temperature, rated power supply

voltage and load (15 pF ± 10%).

-25

–

+25

PPM

-50

–

+50

PPM

Operating Temperature Range

Operating Temperature Range

(Ambient)

T_use

-20

–

+70

°C

Extended Commercial

-40

–

+85

°C

Industrial

Supply Voltage and Current Consumption

Supply Voltage

Vdd

1.62

1.8

1.98

V

2.25

2.5

2.75

V

2.52

2.8

3.08

V

2.7

3.0

3.3

V

2.97

3.3

3.63

V

2.25

–

3.63

V

Current Consumption

Idd

–6.2

7.5

mA

No load condition, f = 125 MHz, Vdd = 2.8V, 3.0V, 3.3V or 2.25

to 3.63V

–

5.5

6.4

mA

No load condition, f = 125 MHz, Vdd = 2.5V

–

4.9

5.6

mA

No load condition, f = 125 MHz, Vdd = 1.8V

OE Disable Current

I_od

–

–

4.3

mA

Vdd = 2.5V to 3.3V, OE = Low, Output in high Z state

–

–

4.1

mA

Vdd = 1.8V, OE = Low, Output in high Z state

Standby Current

I_std

–2.6

4.3

A

Vdd = 2.8V to 3.3V, ST = Low, Output is weakly pulled down

–1.4

2.5

A

Vdd = 2.5V, ST = Low, Output is weakly pulled down

–0.6

1.3

A

Vdd = 1.8V, ST = Low, Output is weakly pulled down

LVCMOS Output Characteristics

Duty Cycle

DC

45

–

55

%

All Vdds

Rise/Fall Time

Tr, Tf

–

1.0

2.0

ns

Vdd = 2.5V, 2.8V, 3.0V or 3.3V, 20% - 80%

–

1.3

2.5

ns

Vdd =1.8V, 20% - 80%

–

1.0

2.0

ns

Vdd = 2.25V - 3.63V, 20% - 80%

Output High Voltage

VOH

90%

–

–

Vdd

IOH = -4 mA (Vdd = 3.0V or 3.3V)

IOH = -3 mA (Vdd = 2.8V and Vdd = 2.5V)

IOH = -2 mA (Vdd = 1.8V)

Output Low Voltage

VOL

–

–

10%

Vdd

IOL = 4 mA (Vdd = 3.0V or 3.3V)

IOL = 3 mA (Vdd = 2.8V and Vdd = 2.5V)

IOL = 2 mA (Vdd = 1.8V)

Input Characteristics

Input High Voltage

VIH

70%

–

–

Vdd

Pin 1, OE or ST

Input Low Voltage

VIL

–

–

30%

Vdd

Pin 1, OE or ST

Input Pull-up Impedance

Z_in

50

87

150

k



Pin 1, OE logic high or logic low, or ST logic high

2–

–

M



Pin 1, ST logic low