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HT6116 Datasheet(PDF) 4 Page - Holtek Semiconductor Inc |
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HT6116 Datasheet(HTML) 4 Page - Holtek Semiconductor Inc |
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4 / 10 page ![]() A.C. Characteristics Read cycle (VDD=5V ±10%, GND=0V, Ta=–40°C to +85°C) Symbol Parameter Min. Typ. Max. Unit tRC Read Cycle Time 70 36 — ns tAA Address Access Time — 35 70 ns tACS Chip Select Access Time — 35 70 ns tOE Output Enable to Output Valid — 12 40 ns tOH Output Hold from Address Change 10 12 — ns tCLZ Chip Enable to Output in Low-Z 10 — — ns tOLZ Output Enable to Output in Low-Z 10 — — ns tOHZ Output Disable to Output in High–Z 0 — 30 ns tCHZ Chip Disable to Output in High-Z 0 — 30 ns Note: 1. A read occurs during the overlap of a low CS and a high WE 2. tCHZ and tOHZ are specified by the time when data out is floating Write cycle (VDD=5V ±10%, GND=0V, Ta=–40°C to +85°C) Symbol Parameter Min. Typ. Max. Unit tWC Write Cycle Time 70 36 — ns tDW Data Set up Time 20 18 — ns tDH Data Hold Time from Write Time 5 0 — ns tAW Address Valid to End of Write 50 15 — ns tAS Address Setup Time 20 14 ns tWP Write Pulse Width 25 0 — ns tWR Write Recovery Time 5 — — ns tCW Chip Selection to End of Write 35 — — ns tOW Output Active from End of Write 5 — — ns tOHZ Output Disable to Output in High-Z 0 — 40 ns tWHZ Write to Output in High-Z 0 — 50 ns Note: 1. A write cycle occurs during the overlap of a low CS and a low WE 2. OE may be both high and low in a write cycle 3. tAS is specified from CS or WE, whichever occurs last 4. tWP is an overlap time of a low CS and a low WE 5. tWR, tDW and tDH is specified from CS or WE, whichever occurs first 6. tWHZ is specified by the time when DATA OUT is floating, not defined by output level 7. When I/O pins are data output mode, don’t force inverse signals to those pins HT6116-70 4 3rd July ’97 |
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