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MP7751GF Datasheet(PDF) 14 Page - Monolithic Power Systems |
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MP7751GF Datasheet(HTML) 14 Page - Monolithic Power Systems |
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14 / 19 page ![]() MP7751 – 26V, 2X20W STEREO BTL FIX FREQUENCY CLASS D AUDIO AMPLIFIER MP7751 Rev. 1.0 www.MonolithicPower.com 14 5/23/2014 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. Figure 1b: enable on with audio signal present Adjustable Power Limit Power limit and anti-clipping feature control. The voltage at pin 10 can used to limit the power to levels below that which is possible based on the supply rail. Connect a resistor divider from AVCC to GND to set power limit. Connect directly to AVCC for no power limit. An external reference may also be used if tighter tolerance is required. Also add a 1μF capacitor from pin 10 to ground. Figure 2. PLIMT Circuit Operation) The PLIMIT circuit sets a limit on the output peak-to-peak voltage. The limiting is done by limiting the duty cycle to fixed maximum value. This limit can be thought of as a "virtual" voltage rail which is lower than the supply connected to PVCC. This "virtual" rail is 8 times the voltage at the PLIMIT pin. This output voltage can be used to calculate the maximum output power for a given maximum input voltage and speaker impedance. 2 L P LS OUT L R V R2 R P 2R ⎛⎞ ⎛⎞ × ⎜⎟ ⎜⎟ +× ⎝⎠ ⎝⎠ = × for unclipped power Where: RS is the total output series resistance (including Rdson and the resistance of output filter. RL is the load resistance. VP is the peak amplifier of the output voltage. VP = 8 x PLIMIT voltage if 8 x PLIMIT < PVCC And OUT OUT P @10%THD 1.25 unclipped P ≈ × Table 1: Power Limit Typical Operation Test Condition PLIMIT Voltage Output Voltage (Vp-p) Output Power (~10% THD) VDD=12V, Vin=1Vrms, Load=8Ω, Gain=20dB 0.80V 14.9 5.0W VDD=18V, Vin=1Vrms, Load=8Ω, Gain=20dB 0.80V 14.9 5.0W VDD=18V, Vin=1Vrms, Load=8Ω, Gain=20dB 1.44V 23.6 10.0W VDD=24V, Vin=1Vrms, Load=8Ω, Gain=20dB 1.44V 23.6 10.0W Gain Setting The gain of the MP7751 is set by the input terminals, GAIN0 and GAIN1. The actual gain settings are controlled by ratios of the internal input and feedback resistors, details please see the below table. |
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