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MP4655 Datasheet(PDF) 24 Page - Monolithic Power Systems

Part # MP4655
Description  Pure, Single-Stage, LLC, LED Current and System Voltage Controller
PDF  31 Pages
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Manufacturer  MPS [Monolithic Power Systems]
Direct Link  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP4655 Datasheet(HTML) 24 Page - Monolithic Power Systems

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MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER
MP4655 Rev 1.0
www.MonolithicPower.com
24
2/2/2016
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
LED Current Compensation Loop (ICOMP)
ICOMP is the compensation node for the LED
current control loop. Connect a capacitor in
series with a resistor on ICOMP or an R-C-C
network (see Figure 6). The zero composed of
RICOMP and CICOMP is recommended to cancel the
pole formed by the LED output. See Equation
(10):
LED
ICOMP
ICOMP
eq _ LED
OUT _ LED
OUT _ LED
LED
11
1
(10% to 20%) * V
R* C
R
* C
*C
I
==
(10)
CICOMP is in range of 10nF to 470nF, typically.
Select CICOMP_P to be less than one-twentieth of
CICOMP.
Figure 6: Compensation Network on ICOMP
System Output Voltage Compensation Loop
through LLC Control (VCOMP)
VCOMP is the compensation node for the system
output voltage control loop through the LLC
frequency. Connect a capacitor in series with a
resistor on VCOMP or an R-C-C network (see
Figure 7). The zero composed of the RICOMP and
CICOMP is recommended to cancel the pole
formed by the system output. See Equation (11):
bus
VCOMP
VCOMP
Vbus
OUT _ Vbus
OUT _ Vbus
out _ full
11
1
V
R* C
R
* C
*C
I
==
(11)
Where CVCOMP is in the range of 10nF to 470nF,
typically.
The pole formed by RVCOMP and CVCOMP_P can be
designed to be around half of the operating
frequency. See Equation (12):
op
VCOMP
VCOMP _ P
f
1
2* R
* C
2
=
π
(12)
Figure 7: Compensation Network on VCOMP
System Output Voltage Compensation Loop
through Duty-Controlled NMOS (DCOMP)
DCOMP is the compensation node for the
system output voltage control loop through the
duty-controlled NMOS. Connect a capacitor in
series with a resistor on DCOMP or an R-C-C
network (see Figure 8).
Figure 8: Compensation Network on DCOMP
The zero composed of RDCOMP and CDCOMP is
recommended to cancel the pole formed by the
system output. See Equation (13):
bus
DCOMP
DCOMP
Vbus
OUT _ Vbus
OUT _ Vbus
out _ full
11
1
V
R* C
R
* C
*C
I
==
(13)
Where CVCOMP is in the range of 4.7nF to 100nF,
typically.
The pole formed by RDCOMP and CDCOMP_P can be
designed to be around half of the operating
frequency. See Equation (14):
op
DCOMP
DCOMP _ P
f
1
2* R
* C
2
=
π
(14)



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