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LTM4625 Datasheet(PDF) 20 Page - Linear Technology |
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LTM4625 Datasheet(HTML) 20 Page - Linear Technology |
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20 / 26 page ![]() LTM4625 20 Rev C For more information www.analog.com APPLICATIONS INFORMATION Figure 19. Recommended PCB Layout Safety Considerations The LTM4625 modules do not provide galvanic isolation from VIN to VOUT. There is no internal fuse. If required, a slow blow fuse with a rating twice the maximum input current needs to be provided to protect each unit from catastrophic failure. The device does support thermal shutdown and over current protection. Layout Checklist/Example The high integration of LTM4625 makes the PCB board layout very simple and easy. However, to optimize its electrical and thermal performance, some layout consid- erations are still necessary. • Use large PCB copper areas for high current paths, including VIN, GND and VOUT. It helps to minimize the PCB conduction loss and thermal stress. • Place high frequency ceramic input and output capaci- tors next to the VIN, PGND and VOUT pins to minimize high frequency noise. • Place a dedicated power ground layer underneath the unit. • To minimize the via conduction loss and reduce module thermal stress, use multiple vias for interconnection between top layer and other power layers. • Do not put via directly on the pad, unless they are capped or plated over. • Use a separated SGND ground copper area for com- ponents connected to signal pins. Connect the SGND to GND underneath the unit. • Bring out test points on the signal pins for monitoring. • KeepseparationbetweenCLKIN,CLKOUTandFREQpin traces to minimize possibility of noise due to crosstalk between these signals. Figure19givesagoodexampleoftherecommendedlayout. VIN COUT GND VOUT RFB 4625 F19 GND CIN |
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