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LTM4644 Datasheet(PDF) 15 Page - Linear Technology

Part # LTM4644
Description  Triple Output 5A/5A/4A Step-Down DC/DC 關Module짰 Regulator
PDF  32 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTM4644 Datasheet(HTML) 15 Page - Linear Technology

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LTM4634
15
4634f
For more information www.linear.com/LTM4634
applicaTions inForMaTion
reference voltage and then proceed up to INTVCC. After the
0.8V ramp, the TK/SS pin will no longer be in control, and
the internal voltage reference will control output regula-
tion from the feedback divider. Foldback current limit is
disabled during this sequence of turn-on during tracking
or soft-starting. The TK/SS pins are pulled low when the
RUN pin is below 1.15V or INTVCC drops below 3.5V. The
total soft-start time can be calculated as:
tSS =
0.8V •CSS
1.5µA


Regardless of the mode selected by the MODE/PLLIN pin,
the regulator channels will always start in pulse-skipping
mode up to TK/SS = 0.64V. Between TK/SS = 0.64V and
0.74V, it will operate in forced continuous mode and revert
totheselectedmodeonceTK/SS>0.74V.Theoutputripple
is minimized during the 100mV forced continuous mode
window ensuring a clean PGOOD signal.
When the channel is configured to track another supply,
the feedback voltage of the other supply is duplicated by
a resistor divider and applied to the TK/SS pin. Therefore,
the voltage ramp rate on this pin is determined by the ramp
rate of the other supply’s voltage. Note that the small soft-
startcapacitorchargingcurrentisalwaysflowing,produc-
ing a small offset error. To minimize this error, select the
tracking resistive divider value to be small enough to make
thiserrornegligible.Inordertotrackdownanotherchannel
orsupplyafterthesoft-startphaseexpires,theLTM4634is
forced into continuous mode of operation as soon as VFB
is below the undervoltage threshold of 0.74V regardless of
the setting of the MODE/PLLIN pin. However, the LTM4634
should always be set in forced continuous mode tracking
down when there is no load. After TK/SS drops below 0.1V,
its channel will operate in discontinuous mode.
The master’s TK/SS pin slew rate is directly equal to the
master’s output slew rate in Volts/Time. The equation:
RTB =
MR
SR


•60.4k
where MR is the master’s output slew rate and SR is the
slave’s output slew rate in Volts/Time. When coincident
tracking is desired, then MR and SR are equal, thus RTB
is equal the 60.4k. RTA is derived from equation:
RTA =
0.8V
VFB
60.4k
+
VFB
RFB
–
VTRACK
RTB
where VFB is the feedback voltage reference of the regula-
tor, and VTRACK is 0.8V. Since RTB is equal to the 60.4k top
feedback resistor of the slave regulator in equal slew rate
or coincident tracking, then RTA is equal to RFB with VFB =
VTRACK.ThereforeRTB=60.4k,andRTA=60.4kinFigure3.
In ratiometric tracking, a different slew rate maybe desired
for the slave regulator. RTB can be solved for when SR is
slower than MR. Make sure that the slave supply slew
rate is chosen to be fast enough so that the slave output
voltage will reach it final value before the master output.
Power Good
The PGOOD12 pin is an open-drain pin that can be used
to monitor valid output voltage regulation for VOUT1 and
VOUT2, and PGOOD3 for monitoring VOUT3. These pins
monitor a ±7.5% window around the 0.8V feedback volt-
age on either VFB1,2,3 from the output regulation point. A
resistor can be pulled up to a particular supply voltage
no greater than 6V maximum for monitoring. Any of the
PGOOD pins are pulled low when the RUN pin of the cor-
responding channel is pulled low.
Overcurrent and Overvoltage Protection
Each of the regulator channels senses the peak inductor
current on a cycle-by-cycle basis in current mode opera-
tion. When current limit is reached the output voltage will
begin to fall and the internal current limit threshold will
begin fold back as the output voltage falls below 50% of
its value. Foldback current limit is disabled during start-
up or track-up. Under short-circuit condition at low duty
cycle operation, each of the regulator channels will begin
to skip cycles to limit the short-circuit current.
Overvoltage protection is implemented by monitoring
each one of the regulator’s VFB pins. When the VFB volt-
age exceeds ~7.5% of the 0.8V reference value, then an



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