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LTM8049 Datasheet(PDF) 27 Page - Linear Technology

Part # LTM8049
Description  EN55022B Compliant 58V, 24W Inverting-Output DC/DC 關Module Regulator
PDF  34 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTM8049 Datasheet(HTML) 27 Page - Linear Technology

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LTM4651
27
4651f
For more information www.linear.com/LTM4651
Figure 28. 5V to –24V Derating
Curve, with BGA Heat Sink
Figure 29. 12V to –24V Derating
Curve, with BGA Heat Sink
Figure 30. 24V to –24V Derating
Curve, with BGA Heat Sink
APPLICATIONS INFORMATION—DERATING CURVES
APPLICATIONS INFORMATION
Safety Considerations
The LTM4651 does not provide galvanic isolation from VIN
to VOUT–. There is no internal fuse. If required, a slow blow
fuse with a rating twice the maximum input current needs
to be provided to protect the unit from catastrophic failure.
The fuse or circuit breaker, if used, should be selected to
limit the current to the regulator in case of a MT MOSFET
fault. If MT fails, the system’s input supply will source
very large currents to PGND through MT. This can cause
excessive heat and board damage depending on how
much power the input voltage can deliver to this system.
A fuse or circuit breaker can be used as a secondary fault
protector in this situation. The LTM4651 does feature
overcurrent and overtemperature protection.
Layout Checklist/Example
The high integration of LTM4651 makes the PCB board
layout straightforward. However, to optimize its electrical
and thermal performance, some layout considerations
are still necessary.
• Use large PCB copper areas for high current paths,
including VIN, PGND and VOUT–. Doing so helps to
minimize the PCB conduction loss and thermal stress.
• Place high frequency ceramic input and output (and, if
used, input-to-output) capacitors next to the VIN, VD,
PGNDandVOUT–pinstominimizehighfrequencynoise.
• Place a dedicated power ground layer underneath the
LTM4651.
• To minimize the via conduction loss and reduce module
thermal stress, use multiple vias for interconnection
between top layer and other power layers.
• Do not put vias directly on pads, unless they are capped
or plated over.
• Use a separate SVOUT– copper plane for components
connected to signal pins. Connect SVOUT– to VOUT–
directly under the module.
• For parallel module applications, connect the VOUT–,
GNDSNS,RUN,ISETa,COMPaandPGOODpinstogether
as shown in Figure 41.
• Bring out test points on the signal pins for monitoring.
Figure 31 gives a good example of the recommended
LTM4651 layout.
0LFM
200LFM
400LFM
AMBIENT TEMPERATURE (°C)
20
40
60
80
100
120
0
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
0.55
4651 F28
0LFM
200LFM
400LFM
AMBIENT TEMPERATURE (°C)
20
40
60
80
100
120
0
0.125
0.250
0.375
0.500
0.625
0.750
0.875
1.000
1.125
1.250
4651 F29
0LFM
200LFM
400LFM
AMBIENT TEMPERATURE (°C)
20
40
60
80
100
120
0
0.25
0.50
0.75
1.00
1.25
1.50
1.75
2.00
4651 F30



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