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LTM8005

8005f

For more information www.linear.com/LTM8005

APPLICATIONS INFORMATION

Hot-Plugging Safely

The small size, robustness and low impedance of ceramic

capacitors make them an attractive option for the input

bypass capacitor of the LTM8005. However, these capaci-

tors can cause problems if the LTM8005 is plugged into

a live supply (see Analog Devices Application Note 88

for a complete discussion). The low loss ceramic capaci-

tor combined with stray inductance in series with the

power source forms an underdamped tank circuit, and

the voltage at the VIN pin of the LTM8005 can ring to

more than twice the nominal input voltage, possibly

exceeding the LTM8005’s rating and damaging the part.

If the input supply is poorly controlled or the LTM8005 is

hot-plugged into an energized supply, the input network

should be designed to prevent this overshoot. This can

be accomplished by installing a small resistor in series

to VIN, but the most popular method of controlling input

voltage overshoot is to add an electrolytic bulk cap to the

VIN net. This capacitor’s relatively high equivalent series

resistance damps the circuit and eliminates the voltage

overshoot. The extra capacitor improves low frequency

ripple filtering and can slightly improve the efficiency of

the circuit, though it is likely to be the largest component

in the circuit.

Thermal Considerations

The LTM8005 output current may need to be derated if

it is required to operate in a high ambient temperature or

deliver a large amount of continuous power. The amount

of current derating is dependent upon the input voltage,

output power and ambient temperature.

It is incumbent upon the user to verify proper operation

over the intended system’s line, load and environmental

operating conditions.

The thermal resistance numbers listed in Page 2 of the

data sheet are based on modeling the µModule package

mounted on a test board specified per JESD51-9 (“Test

Boards for Area Array Surface Mount Package Thermal

Measurements”). The thermal coefficients provided in this

page are based on JESD 51-12 (“Guidelines for Reporting

and Using Electronic Package Thermal Information”).

For increased accuracy and fidelity to the actual applica-

tion, many designers use FEA to predict thermal perfor-

mance. To that end, Page 2 of the data sheet typically

gives four thermal coefficients:

JA – Thermal resistance from junction to ambient

JCBOTTOM – Thermal resistance from junction to the bot-

tom of the product case

JCTOP – Thermal resistance from junction to top of the

product case

JB – Thermal resistance from junction to the printed cir-

cuit board.

While the meaning of each of these coefficients may seem

to be intuitive, JEDEC has defined each to avoid confusion

and inconsistency. These definitions are given in JESD

51-12, and are quoted or paraphrased below:

JA is the natural convection junction-to-ambient

air thermal resistance measured in a one cubic foot

sealed enclosure. This environment is sometimes

referred to as “still air” although natural convection

causes the air to move. This value is determined with

the part mounted to a JESD 51-9 defined test board,

which does not reflect an actual application or viable

operating condition.

JCBOTTOM is the thermal resistance between the

junction and bottom of the package with all of the

component power dissipation flowing through the

bottom of the package. In the typical µModule con-

verter, the bulk of the heat flows out the bottom of

the package, but there is always heat flow out into

the ambient environment. As a result, this thermal

resistance value may be useful for comparing pack-

ages but the test conditions don’t generally match the

user’s application.

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