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LTM4677 Datasheet(PDF) 6 Page - Linear Technology |
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LTM4677 Datasheet(HTML) 6 Page - Linear Technology |
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6 / 22 page ![]() LTC3874-1 6 38741f For more information www.linear.com/LTC3874-1 pin FuncTions ISENSE0 +/ISENSE1+(Pin 1/Pin 6): Current Sense Compara- tor Inputs. The (+) inputs to the current comparators are normally connected to DCR sensing networks. ISENSE0 −/ISENSE1−(Pin 2/Pin 5): Current Sense Compara- tor Inputs. The (−) inputs to the current comparators are connected to the outputs. RUN0/RUN1 (Pin 3/Pin 4): Enable Run Inputs. Logic high on the RUN pin enables the corresponding channel. MODE0/MODE1(Pin 24/Pin 7): DCM/CCM Mode Control Pins. Each channel runs in forced continuous mode if the mode pin is logic high. There is an internal 500k pull-down resistor on the mode pin. To select discontinuous conduc- tion mode, float or pull down the mode pin. ITH0/ITH1(Pin 23/Pin 8): Current Control Threshold. Each associatedchannel’scurrentcomparatortrippingthreshold increases with its ITH voltage. These pins must be con- nected to the master controller’s ITH pins. FREQ(Pin 9): Frequency Set Pin. There is a precision 10µA current flowing out of this pin. A resistor to ground sets a voltage which in turn programs the frequency. This pin sets the default switching frequency when there is no external clock on the SYNC pin. See the application section for detailed information. ILIM(Pin 10): Current Comparators Sense Voltage Limit. Program a DC voltage at this pin to set the maximum cur- rent sense threshold for the current comparators. SYNC (Pin 11): External Clock Synchronization Input. If an externalclockispresentatthispin,theswitchingfrequency will be synchronized to the falling edge of external clock. Tie this pin to GND if not used. PHASMD (Pin 12): Phase Set Pin. This pin determines the relative phases between the external clock on pin SYNC and the internal controllers. See Table 1 in the Operation section for details. PWM0/PWM1(Pin 19/Pin 13): (Top) Gate Signal Outputs. This signal goes to the PWM or top gate input of the exter- nal driver, integrated driver MOSFET or power block. This is a three-state compatible output. To support three-state mode, an external resistor divider is typically used from VCC0/VCC1 to ground. VCC0/VCC1(Pin 18/Pin 14): PWM Pin Driver Supplies. Decouple this pin to GND with a capacitor (0.1μF) to an external supply or tie this pin to the INTVCC pin. PWM0/ PWM1 signal swing is from ground to VCC0/VCC1. EXTVCC(Pin15):ExternalPowerInputtoanInternalSwitch Connected to INTVCC. The switch closes and supplies the IC power, bypassing the internal low dropout regulator, whenever EXTVCC is higher than 4.7V and VIN is greater than 7V. Do not exceed 6V on this pin. INTVCC(Pin16):Internal5.5VRegulatorOutput.Thecontrol circuits are powered from this voltage. Decouple this pin to GND with a minimum of 4.7μF low ESR tantalum or ceramic capacitor. VIN (Pin 17): Main Input Supply. Decouple this pin to GND with a capacitor (0.1μF to 1μF). FAULT0/FAULT1 (Pin 21/Pin 20): Master Controller Fault Inputs. Connect these pins to the master chip fault indica- tor pins to respond to the fault signals from the master controller. When a FAULT pin is floating or low, the PWM pin of the corresponding channel is in three-state. There is an internal 500k pull-down resistor on each FAULT pin. LOWDCR(Pin 22): Sub-milliohm DCR Current Sensing Enable Pin. There is an internal 500k pull-up resistor between the LOWDCR pin and INTVCC. Floating or pull- ing this pin logic high will enable the sub-milliohm DCR current sensing. Pulling this pin logic low will disable the sub-milliohm DCR current sensing. GND(Exposed Pad Pin 25): Ground. Connect this pad, through vias, to a solid ground plane under the circuit. The sources of the bottom N-channel MOSFETs, the (–) terminal of CINTVCC, and the (–) terminal of CIN should connect to this ground plane as closely as possible to the IC. All small-signal components and compensation components should also connect to this ground plane. |
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