LTM9002 datasheet(4/28 Pages) LINER

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LTC2158-12

215812fa

For more information www.linear.com/LTC2158-12

INTERNAL REFERENCE CHARACTERISTICS The

denotes the specifications which apply over the

full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5)

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

VCM Output Voltage

IOUT = 0

0.435 •

VDD – 18mV

0.435 •

VDD

0.435 •

VDD + 18mV

VCM Output Temperature Drift

±37

ppm/°C

VCM Output Resistance

–1mA < IOUT < 1mA

VREF Output Voltage

IOUT = 0

1.225

1.250

1.275

VREF Output Temperature Drift

±30

ppm/°C

VREF Output Resistance

–400µA < IOUT < 1mA

VREF Line Regulation

1.71V < VDD < 1.89V

0.6

mV/V

DIGITAL INPUTS AND OUTPUTS The

denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. (Note 5)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

ENCODE INPUTS (ENC+, ENC–)

VID

Differential Input Voltage

(Note 8)

0.2

VICM

Common Mode Input Voltage

Internally Set

Externally Set (Note 8)

1.1

1.2

1.5

RIN

Input Resistance

(See Figure 2)

kΩ

CIN

Input Capacitance

(Note 8)

DIGITAL INPUTS (CS, SDI, SCK)

VIH

High Level Input Voltage

VDD = 1.8V

1.3

VIL

Low Level Input Voltage

VDD = 1.8V

0.6

IIN

Input Current

VIN = 0V to 3.6V

–10

µA

CIN

Input Capacitance

(Note 8)

SDO OUTPUT (Open-Drain Output. Requires 2k Pull-Up Resistor if SDO Is Used)

ROL

Logic Low Output Resistance to GND

VDD = 1.8V, SDO = 0V

200

IOH

Logic High Output Leakage Current

SDO = 0V to 3.6V

–10

µA

COUT

Output Capacitance

(Note 8)

POWER REQUIREMENTS The

denotes the specifications which apply over the full operating temperature

range, otherwise specifications are at TA = 25°C. (Note 5)

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

VDD

Analog Supply Voltage

(Note 9)

1.74

1.8

1.9

OVDD

Output Supply Voltage

(Note 9)

1.74

1.8

1.9

IVDD

Analog Supply Current

340

370

IOVDD

Digital Supply Current

1.75mA LVDS Mode

3.5mA LVDS Mode

PDISS

Power Dissipation

1.75mA LVDS Mode

3.5mA LVDS Mode

688

738

756

812

PSLEEP

Sleep Mode Power

Clock Disabled

Clocked at fS(MAX)

PNAP

Nap Mode Power

Clocked at fS(MAX)

190

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