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LT6237 Datasheet(PDF) 37 Page - Linear Technology

Part # LT6237
Description  16-Bit, 1Msps, 8-Channel SAR ADC with 96dB SNR
PDF  52 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LT6237 Datasheet(HTML) 37 Page - Linear Technology

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LTC2373-16
37
237316fa
For more information www.linear.com/LTC2373-16
Figure 24. MUX Reset Timing
TiMing DiagraMs
MUX Reset Timing
The parasitic capacitances (CPAR) on the output summing
nodes of the MUX, MUXOUT+/–, are discharged to ground
every conversion cycle and when a first new valid con-
figuration word is programmed into the sequencer. This
is done to avoid crosstalk between input channels due to
charge sharing from CPAR. The bottom most waveform in
Figure24representsthevoltagesoftheMUXoutputnodes.
The MUX is being reset when V(MUXOUT+/–) sits at 0V.
The MUX turns OFF and begins resetting tCNVMRST ns
after a conversion is initiated by the rising edge of CNV.
After tMRST1 ns, the MUX turns ON to the next channel
programmed in the sequencer.
The MUX also turns OFF and resets after tVLDMRSTnswhen
afirstnewvalidconfigurationwordisprogrammedintothe
sequencer on the 8th rising edge of SCK. This is because
the MUX may need to switch channels based on the newly
input configuration, so memory of the previous channel
needs to be cleared. A new acquisition period begins when
the MUX is reconnected after tMRST2 ns.
CNV
BUSY
V(MUXOUT+/–)
0V
tMRST1
tCNVMRST
1
2
3
4
SCK
5
6
7
8
SDO
237316 F24
D15 D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
9
10
11
12
13
14
15
16
D1
D0
SOS
SDI
C[7] C[6] C[5]
C[4]
C[3] C[2] C[1] C[0]
tVLDMRST
tMRST2
tACQ



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