LTC3871 datasheet(16/24 Pages) LINER

16 / 24 page

LTC7106

Rev A

For more information www.analog.com

Figure 7. MFR_RAIL_ADDRESS Data Byte

PMBus COMMAND DETAILS

7106 F07

7-BIT ADDRESS

CLEAR B7 TO ENABLE RAIL ADDRESS

MFR_RESET

This command provides a means by which the user can

perform a reset of the LTC7106. All latched faults (ALERT

and status register) and register contents will be reset to a

power-on condition by this command. VOUT will remain in

regulation but may change due to the reset of the margin

registers.

This write-only command accepts zero, one, or two data

bytes but ignores them.

MFR_RAIL_ADDRESS

The MFR_RAIL_ADDRESS command allows all devices

to share a common address, such as all devices attached

to a single power supply rail. The desired 7-bit address

value is written to the 7 bits of the data byte.

TheMSB(bitB7)mustbesetlowtoenablecommunication

using the MFR_RAIL_ADDRESS address. Setting this bit

disables this address. The default for this register is 0x80.

OPERATION

The OPERATION command is used to turn the unit on/off

and for margining the output voltage.

The ON bit is automatically reset to ON after a master

shutdown (EN), power cycle, or MFR_RESET command.

The MARGIN_LOW/HIGH bits command the IOUT refer-

ence to the offset value stored in either the MFR_IOUT_

MARGIN_HIGH or MFR_IOUT_MARGIN_LOW.

This command has one data byte. It will accept one or two

but ignores the second byte.

Table 6. Supported OPERATION Command Register Values

ACTION

VALUE

Turn Off Immediately

0x00

Turn On

0x80

Margin Low

0x98

Margin High

0xA8

PMBus_REVISION

ThePMBUS_REVISIONcommandindicatestherevisionof

the PMBus to which the device is compliant. The LTC7106

is PMBus Version 1.2 compliant in both Part I and Part II.

This read-only command has one data byte and will

return 0x22.

MFR_SPECIAL_ID

The 16-bit word representing a unique identification for

LTpowerPlay.

This read-only command has 2 data bytes and is set to

0x8080.

The user should only perform command writes to this

address. If a read is performed from this address and the

rail devices do not respond with EXACTLY the same value,

the LTC7106 will detect bus contention and abort its read

command with no CML or ALERTB set.

This command accepts one or two data bytes but the

second is ignored.

LTC3871 Datasheet(PDF) 16 Page - Linear Technology

LTC3871 Datasheet(HTML) 16 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Datasheet Download

Link URL