4

HD3SS3202

SLASEO1 – MAY 2018

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Copyright © 2018, Texas Instruments Incorporated

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Theseare stress ratings

only, which do not imply functional operation of the device at these or anyother conditions beyond those indicated under Recommended

OperatingConditions. Exposure to absolute-maximum-rated conditions for extended periods mayaffect device reliability.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

Supply voltage

–0.5

4

V

Voltage

Differential I/O

–0.5

2.5

V

Control pins

–0.5

Storage temperature

–65

150

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safemanufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safemanufacturing with a standard ESD control process.

6.2 ESD Ratings

VALUE

UNIT

Electrostatic

discharge

±2000

V

±500

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

NOM

MAX

UNIT

Supply voltage

3

3.3

3.6

V

Input high voltage (SEL, OEn pins)

2

V

Input low voltage (SEL, OEn pins)

–0.1

0.8

V

High-speed signal pins differential voltage

0

1.8

High speed signal pins common mode voltage

0

2

V

Operating free-air/ambient temperature

HD3SS3202RSV

0

70

°C

HD3SS3202IRSV

–40

85

(1)

For more information about traditional and new thermalmetrics, see the Semiconductor and IC Package ThermalMetrics application

report.

6.4 Thermal Information

HD3SS3202

UNIT

RSV (VQFN)

16 PINS

Junction-to-ambient thermal resistance

117.3

°C/W

Junction-to-case (top) thermal resistance

52.1

°C/W

Junction-to-board thermal resistance

52.6

°C/W

Junction-to-top characterization parameter

1.2

°C/W

Junction-to-board characterization parameter

51.1

°C/W

Junction-to-case (bottom) thermal resistance

n/a

°C/W