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MP2617HGL Datasheet(PDF) 26 Page - Monolithic Power Systems |
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MP2617HGL Datasheet(HTML) 26 Page - Monolithic Power Systems |
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26 / 31 page ![]() MP2617H – SINGLE-CELL SWITCHING CHARGER WITH NVDC POWER PATH MP2617H Rev. 1.03 www.MonolithicPower.com 26 1/15/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. Table 4: Inductance Selection Guide under different Input Voltage SPEC Inductance Selection VIN IN SYS SYS L IN S V V V L I V f (MHz) ΔI L=max (0.3*ICHG,0.5A) ΔI LMIN=0.5A ΔI LMAX=0.9A LMIN (uH) LMAX (uH) L (uH) Saturation Current (A) (6) DCR (m Ω) Package 5V 0.367 1.25 1.0 >3.95 <50 Application Required 9V 1.5 2.8 2.2 >3.95 <50 Application Required 12V 1.75 3.5 2.2 >6 (7) <50 Application Required For the condition that VIN is higher or equal to 12V, and the total output power including system load and battery charging is over 10W, an 1A schottky diode from SW to GND is required. The voltage rating of the schottky diode is usually selected at 30V. Selecting the Input Capacitor The input capacitor (CIN) from the typical application circuit absorbs the maximum ripple current from the PWM converter, which is given by Equation (15): SYS _ MIN IN _ MAX SYS _ MIN RMS _ MAX CC _ MAX IN _ MAX V (V V ) II V (15) For ICC_MAX = 3A, VSYS_MIN = 3.6V, VIN_MAX = 14V, the maximum ripple current is 1.3A. Select the input capacitors so that the temperature rise caused by the ripple current does not exceed 10°C. Ceramic capacitors with X5R or X7R dielectrics are recommended because of their low ESR and small temperature coefficients. For most applications, use a 10µF capacitor. When input voltage is over 10V, 22uF capacitor is used for CIN. Besides, usually a small cap with at least 1uF (C1) from IN to GND is required to be put as much close as possible to the IC. For the input voltage is high to 14V, consider the spike when input insert, select the input capacitors (both the 22uF and 1uF) in 25V rating. Selecting the Output Capacitor The output capacitor (CSYS) from the typical application circuit is parallel with the SYS load. CSYS absorbs the high-frequency switching ripple current and smoothes the output voltage. Its impedance must be much less than that of the system load to ensure that it absorbs the ripple current properly. Ceramic capacitors are recommended for their lower ESR and smaller size, which allows the ESR of the output capacitor to be ignored. The output voltage ripple can be calculated with Equation (16): % L f 2 C 8 V V 1 V V r 2 S IN SYS SYS SYS (16) To guarantee ±0.5% system voltage accuracy, the maximum output voltage ripple must not exceed 0.5% (e.g.: 0.1%). The maximum output voltage ripple occurs at the minimum system voltage and the maximum input voltage. The output capacitor can be calculated with Equation (17): SYS _ MIN IN SYS 2 S V 1 V C 8 f L r (17) When SYSFB pin is floating, output voltage ripple is the main concern to select the output capacitor (CSYS), refer to Table 5 for detail selection guide about the SYS capacitance selection under typical inputs. NOTE: 6) Saturation Current of the inductor should be higher than the IPEAK, add 0.5A margin here. 7) This requirement is for SYS short protection consideration. It could be >3.95A as usual if this feature is not included in the application. |
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