PEF22504HT datasheet(44/255 Pages) INFINEON

44 / 255 page

QuadLIU

PEF 22504

Pin Descriptions

Data Sheet

Rev. 1.3, 2006-01-25

109

XL1.1

(analog)

–

Transmit Line 1, port 1

Analog output to the external transformer. Selected if

LIM1.DRS is cleared. After reset this pin is in high-

impedance state until bit FMR0.XC1 is set and XPM2.XLT is

cleared.

XDOP1

–

Transmit Data Output Positive, port 1

This digital output for transmitted dual-rail PCM(+) route

signals can provide

•

Half bauded signals with 50% duty cycle (LIM0.XFB = 0

•

Full bauded signals with 100% duty cycle (LIM0.XFB =

The data is clocked with positive transitions of XCLK1 in both

cases. Output polarity is selected by bit LIM0.XDOS (after

reset: active low). The dual-rail mode is selected if LIM1.DRS

and FMR0.XC1 are set. After reset this pin is in high-

impedance state until register LIM1.DRS is set and

XPM2.XLT is cleared.

XOID1

–

Transmit Optical Interface Data, port 1

Unipolar data sent to a fiber-optical interface with 2048 kbit/s

(E1) or 1544 kbit/s (T1/J1) which is clocked on the positive

transitions of XCLK1. Clocking of data in NRZ code is done

with 100% duty cycle. Data in CMI code is shifted out with

50% or 100% duty cycle on both transitions of XCLK

according to the CMI coding. Output polarity is selected by bit

LIM0.XDOS (after reset: data is sent active high). The single-

rail mode is selected if LIM1.DRS is set and FMR0.XC1 is

cleared. After reset this pin is in high-impedance state until

Table 2

I/O Signals for P-TQFP-144-8 (cont’d)

Pin No.

Name

Pin Type

Buffer

Type

Function

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