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PEF22504HT Datasheet(PDF) 91 Page - Infineon Technologies AG

Part # PEF22504HT
Description  Quad E1/T1/J1 Line Interface Component for Long- and Short-Haul Applications
PDF  255 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

PEF22504HT Datasheet(HTML) 91 Page - Infineon Technologies AG

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Data Sheet
91
Rev. 1.3, 2006-01-25
QuadLIU
TM
PEF 22504
Functional Description
In the first (“non-generic”) application only the analog switch is used. These switch is ´on´ in the active and ´off´ in
the stand-by channel. The 300
Ω switch is unused (always ´off´, register bit LIM2.MPAS of both channels is always
´0´). Also the transmit interface works in a non-generic mode (see Chapter 3.9.1): The register bit PC6.TSRE of
both channels is always ´0´. The configuration (additional to that of Table 19) is shown in Table 20:
In the generic redundancy application different line impedances Z
0 can be used without changing the board.
Additionally to the the analog switch the 300
Ω switch is used to match the termination resistance to the different
line impedances Z
0 (register bit LIM2.MPAS of both channels). In the active channel this switch is ´on´ if the line
impedance is 75
Ω and ´off´ otherwise. In the stand-by channel this switch is always óff´, see Table 22.
Also the transmit interface works in a generic mode (see Chapter 3.9.1) using the register bit PC6.TSRE of both
channels.
The configuration (additional to that of Table 19) is shown in Table 21:
Table 22 illustrates the switching in the receive path used in the “generic” redundancy application:
3.7.4
Loss-of-Signal Detection
There are different definitions for detecting Loss-Of-Signal (LOS) alarms in the ITU-T G.775 and ETS 300233. The
QuadLIU
TM covers all these standards. The LOS indication is performed by generating an interrupt (if not masked)
and activating a status bit. Additionally a LOS status change interrupt is programmable by using register GCR.SCI.
•
Detection: An alarm is generated if the incoming data stream has no pulses (no transitions) for a certain
number (N) of consecutive pulse periods. A pulse with an amplitude less than Q dB below nominal is the criteria
for “no pulse” in the analog receive interface (LIM1.DRS = ´0´) (LIM1). The receive signal level Q is
programmable by three control bits LIM1.RIL(2:0) see Table 56. The number N can be set by an 8-bit register
(PCD). The contents of the PCD register is multiplied by 16, which results in the number of pulse periods, i.e.
the time which has to suspend until the alarm has to be detected. The programmable range is 16 to 4096 pulse
Table 20
Configuration for “non-generic” Redundancy Applications, Switching with only one Board
Signal
Line Impedance Z
0
[Ohm]
R
S [Ohm]
R
SER [Ohm]
LIM2.MPAS
PC6.TSRE
120
95
5.5 or 0, see
Table 28
00
110
100
75
70
Table 21
Configuration for “generic” Redundancy Applications, Switching with only one Board Signal
Line Impedance Z
0
[Ohm]
R
S [Ohm]
R
SER [Ohm]
LIM2.MPAS
PC6.TSRE
120
95
0
0See Table 28
110
100
75
1
Table 22
Switching in “Generic” Redundancy Application
Channel
300 Ohm Switch
Analog Switch
Active channel
Off, if Z
0 is 120 Ω,110 Ω or 100 Ω (GPC1.MPAS = ´0´)
On, if Z
0 is 75 Ω (LIM2.MPAS = ´1´)
On
Stand-by channel
Off
Off



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