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ISL9219 Datasheet(PDF) 10 Page - Renesas Technology Corp |
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ISL9219 Datasheet(HTML) 10 Page - Renesas Technology Corp |
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10 / 12 page ![]() FN6606 Rev 2.00 Page 10 of 12 April 7, 2010 ISL9219 Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com For additional products, see www.intersil.com/en/products.html © Copyright Intersil Americas LLC 2008-2010. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. Input and Output Capacitor Selection A 0.47µF or higher value ceramic capacitor for the input is recommended. Due to the inductance of the power leads of the wall adapter or USB source, the input capacitor type must be properly selected to prevent high voltage transient during a hot-plug event. A tantalum capacitor is a good choice for its high ESR, providing damping to the voltage transient. Multi-layer ceramic capacitors, however, have a very low ESR and hence when chosen as input capacitors, a 1 series resistor is recommended, as shown in the “Typical Application” schematic on page 5, to provide adequate damping. When the battery is attached to the charger, the output capacitor can be any ceramic type with the value higher than 0.1µF. However, if there is a chance the charger will be used as an LDO linear regulator, a 10µF tantalum capacitor is recommended. Board Layout Recommendations The ISL9219 internal thermal foldback function limits the charge current when the internal temperature reaches approximately +125°C. In order to maximize the current capability, it is very important that the exposed pad under the package is properly soldered to the board and is connected to other layers through thermal vias. More thermal vias and more copper attached to the exposed pad usually result in better thermal performance. On the other hand, the number of vias is limited by the size of the pad. The exposed pad is big enough for 5 vias. State Diagram The state diagram is shown in Figure 3. There area total of 5 states during a complete charging cycle: trickle charge, CC charge, CV charge, charge complete/recharge, fault and suspend. In the trickle mode, the ISL9219 charges the battery in a trickle current. If VOUT reaches VMIN before the trickle charge timeout interval, the operation will move to the CC mode. Before entering the CC mode, the input source is identified. The CC mode output current is set according to the input type as described in “USB Compliant Current Setting” on page 7. When the output voltage reaches the 4.2V final voltage, the operation will move CV mode, where the battery is charged at a constant voltage. If the end-of- charge current is reached before the timeout interval is elapsed, the operation moves to charge complete state. The charger continues to charge the battery until a timeout condition is reached, then the charging will be terminated. After the termination, if the output voltage drops below the recharge threshold, a recharge starts and the timer is rest to zero. The STAT1 and STAT2 indications, remains the same as the charge complete state. In the event that the timeout condition is reached before EOC, the fault mode is entered. The fault mode can also be triggered by an OTP event. To exit the fault mode, the input power has to be removed and re-applied, or the EN pin is toggled to HI and back to LO, then a new cycle starts. |
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