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TUSB1044 Datasheet(PDF) 44 Page - Texas Instruments |
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TUSB1044 Datasheet(HTML) 44 Page - Texas Instruments |
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44 / 67 page ![]() 44 TUSB1044 SLLSF47B – FEBRUARY 2018 – REVISED APRIL 2018 www.ti.com Product Folder Links: TUSB1044 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Table 22. USB3_MISC Register Field Descriptions (continued) Bit Field Type Reset Description 1-0 USB_COMPLIANCE_CTR L R/W 0h Controls whether compliance mode is determined by FSM or register. 0h = Compliance mode determined by FSM. 1h = Compliance mode enabled in DFP direction. 2h = Compliance mode enabled in UFP direction. 3h = Compliance mode disabled. 7.6.1.12 USB3_LOS Register (Offset = 23h) [reset = 23h] USB3_LOS is shown in Figure 34 and described in Table 23. Return to Summary Table. Figure 34. USB3_LOS Register 7 6 5 4 3 2 1 0 RESERVED CFG_LOS_HYST CFG_LOS_VTH R-0h R/W-4h R/W-3h Table 23. USB3_LOS Register Field Descriptions Bit Field Type Reset Description 7-6 RESERVED R 0h Reserved 5-3 CFG_LOS_HYST R/W 4h Controls LOS hysteresis defined as 20 log (LOS de-assert threshold/LOS assert threshold). 0h = 0.15 dB 1h = 0.85 dB 2h = 1.45 dB 3h = 2.00 dB 4h = 2.70 dB 5h = 3.00 dB 6h = 3.40 dB 7h = 3.80 dB 2-0 CFG_LOS_VTH R/W 3h Controls LOS assert threshold voltage 0h = 67 mV 1h = 72 mV 2h = 79 mV 3h = 85 mV 4h = 91 mV 5h = 97 mV 6h = 105 mV 7h = 112 mV |
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