EL1881CSZ datasheet(3/13 Pages) RENESAS

3 / 13 page

EL1881

FN7018 Rev 2.00

Page 3 of 13

September 15, 2011

Absolute Maximum Ratings (TA = +25°C)

Thermal Information

VCC Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V

Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C

Pin Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to VCC +0.5V

Thermal Resistance (Typical, Note 5)

JA (°C/W)

8 Lead PDIP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

8 Lead SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

95 to 120

Operating Ambient Temperature Range . . . . . . . . . .-40°C to +85°C

Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .400mW

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and

result in failures not covered by warranty.

NOTE:

JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests

are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA

DC Electrical Specifications

VDD = 5V, TA = +25°C, RSET = 681k, unless otherwise specified.

PARAMETER

DESCRIPTION

MIN

TYP

MAX

UNIT

IDD, Quiescent

VDD = 5V

0.75

1.5

Clamp Voltage

Pin 2, ILOAD = -100µA

1.35

1.5

1.65

Clamp Discharge Current

Pin 2 = 2V

µA

Clamp Charge Current

Pin 2 = 1V

-1.3

-1

0.7

RSET Pin Reference Voltage

Pin 6

1.1

1.22

1.35

VOL Output Low Voltage

IOL = 1.6mA

0.24

0.5

VOH Output High Voltage

IOH = -40µA

4.8

IOH = -1.6mA

4.6

Dynamic Specifications

PARAMETER

DESCRIPTION

MIN

TYP

MAX

UNIT

Comp Sync Prop Delay, tCS

See Figure 20

Vertical Sync Width, tVS

Normal or Default Trigger, 50% to 50%

190

230

300

µs

Vertical Sync Default Delay, tVSD

See Figure 21

µs

Burst/Back Porch Delay, tBD

See Figure 20

120

200

300

Burst/Back Porch Width, tB

See Figure 20

2.5

3.5

4.5

µs

Input Dynamic Range

Video Input Amplitude to Maintain 50% Slice Spec

0.5

VP-P

Slice Level

VSLICE/VCLAMP

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