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MAX3521 Datasheet(PDF) 3 Page - Maxim Integrated Products |
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MAX3521 Datasheet(HTML) 3 Page - Maxim Integrated Products |
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3 / 11 page ![]() Maxim Integrated │ 3 www.maximintegrated.com Evaluates: MAX3521 MAX3521 Evaluation Kit Detailed Description Gain Calculations The 1:4 impedance ratio transformer (T1) on the EV kit converts the unbalanced 50Ω impedance of the signal generator to a balanced 200Ω, matching the input of the device. T1 is included to assist in evaluation of the device using standard 50Ω lab equipment. It is not required for most applications. A 1:4 impedance ratio corresponds to a 1:2 voltage ratio, or 6dB voltage gain. The power loss of T1, which must be included, is approximately 0.3dB across the operating frequency range of the device, giving a total voltage gain due to T1 of 5.7dB. A minimum loss pad (MLP) on the output of T2 trans- forms the 75Ω output impedance of the device to 50Ω test-equipment impedance, with a voltage loss of 7.4dB. Because the 1:2 impedance ratio output transformer (T2) is required in the application, we do not include the loss in this transformer in the voltage-gain calculation. To calculate the voltage gain of the device from 50Ω power measurements at RFIN and RFOUT on the EV kit: AV = POUT(dBm) + 7.4dB (MLP) - [PIN(dBm) + 5.7dB (T1)] = POUT(dBm) - PIN(dBm) + 1.7dB Layout Considerations The EV kit can serve as a guide for PCB layout. Keep RF signal lines as short as possible to minimize losses and radiation. To minimize second-order distortion, traces in the balanced input and output circuitry should be as symmetric as possible. The exposed pad must be soldered evenly to the board’s ground plane for proper operation. Use abundant vias beneath the exposed pad for maximum heat dissipation. Use abundant ground vias between RF traces to minimize undesired coupling. To minimize coupling between different sections of the device, the ideal power-supply layout is a star configuration, which has a large decoupling capacitor at the central VCC node. The VCC traces branch out from this node, with each trace going to separate VCC pins of the device. Each VCC pin must have a bypass capacitor with low impedance to ground at the frequency of interest. Do not share ground vias among multiple connections to the PCB ground plane. |
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