AD8315ARMZ datasheet(3/22 Pages) AD

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Data Sheet

AD8315

Rev. D | Page 3 of 22

SPECIFICATIONS

VS = 2.7 V, T = 25°C, 52.3 Ω termination on RFIN, unless otherwise noted.

Table 1.

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

OVERALL FUNCTION

Frequency Range1

To meet all specifications

0.1

2.5

GHz

Input Voltage Range

±1 dB log conformance, 0.1 GHz

−57

−11

dBV

Equivalent dBm Range

−44

dBm

Logarithmic Slope2

0.1 GH

21.5

25.5

mV/dB

Logarithmic Intercept2

0.1 GHz

−79

−70

−64

dBV

Equivalent dBm Level

−66

−57

−51

dBm

RF INPUT INTERFACE

Pin RFIN

Input Resistance3

0.1 GHz

2.8

kΩ

Input Capacitance3

0.1 GHz

0.9

OUTPUT

Pin VAPC

Minimum Output Voltage

VSET ≤ 200 mV, ENBL high

0.25

0.27

0.3

ENBL low

0.02

Maximum Output Voltage

RL ≥ 800 Ω

2.45

2.6

vs. Temperature4

85°C, VPOS = 3 V, IOUT = 6 mA

2.54

General Limit

2.7 V ≤ VPOS ≤ 5.5 V, RL = ∞

VPOS − 0.1

Output Current Drive

Source/Sink

5/200

mA/μA

Output Buffer Noise

nV√Hz

Output Noise

RF input = 2 GHz, 0 dBm, fNOISE = 100 kHz, CFLT = 220 pF

130

nV/√Hz

Small Signal Bandwidth

0.2 V to 2.6 V swing

MHz

Slew Rate

10% to 90%, 1.2 V step (VSET), open loop5

V/μs

Response Time

FLTR = open, see Figure 27

150

SETPOINT INTERFACE

Pin VSET

Nominal Input Range

Corresponding to central 50 dB

0.25

1.4

Logarithmic Scale Factor

43.5

dB/V

Input Resistance

100

kΩ

Slew Rate

V/μs

ENABLE INTERFACE

Pin ENBL

Logic Level to Enable Power

1.8

VPOS

Input Current when Enable

High

μA

Logic Level to Disable Power

0.8

Enable Time

Time from ENBL high to VAPC within 1% of final value,

VSET ≤ 200 mV, refer to Figure 24

μs

Disable Time

Time from ENBL low to VAPC within 1% of final value,

VSET ≤ 200 mV, refer to Figure 24

μs

Power-On/Enable Time

Time from VPOS/ENBL high to VAPC within 1% of final value,

VSET ≤ 200 mV, refer to Figure 29

μs

Time from VPOS/ENBL low to VAPC within 1% of final value,

VSET ≤ 200 mV, refer to Figure 29

100

200

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