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Datasheet

Datasheet

BD62012FS

TSZ02201-0828ABB00020-1-2

© 2013 ROHM Co., Ltd. All rights reserved.

15.MAR.2013 Rev.003

http://www.rohm.com

TSZ22111 · 15 · 001

 Notes for Use

1) Absolute maximum ratings

Devices may be destroyed when supply voltage or operating temperature exceeds the absolute maximum rating. Because

the cause of this damage cannot be identified as, for example, a short circuit or an open circuit, it is important to consider

circuit protection measures, such as adding fuses, if any value in excess of absolute maximum ratings is to be

implemented.

2) Electrical potential at GND

Keep the GND terminal to the minimum potential under any operating condition. In addition, check to determine whether

there is any terminal that provides voltage below GND, including the voltage during transient phenomena. However, note

that even if the voltage does not fall below GND in any other operating condition, it can still swing below GND potential

when the motor generates back electromotive force at the RCL terminal. The chip layout in this product is designed to

avoid this sort of electrical potential problem, but pulling excessive current may still result in malfunctions. Therefore, it is

necessary to observe operation closely to conclusively confirm that there is no problem in actual operation. If there are

small signal GND and high current GND, it is recommended to separate the patterns for the high current GND and the

small signal GND and provide a proper grounding to the reference point of the set not to affect the voltage at the small

signal GND with the change in voltage due to resistance component of pattern wiring and high current. Also for GND wiring

pattern of the component externally connected, pay special attention not to cause undesirable change to it.

3) Driver outputs

The high voltage semiconductor generally driven by this product is connected to the next stage via the controller. If any

special mode in excess of absolute maximum ratings is to be implemented with this product or its application circuits, it is

important to take physical safety measures, such as providing voltage-clamping diodes or fuses.

4) Thermal design

Use a thermal design that allows sufficient margin in light of the power dissipation (Pd) in actual operating conditions.

5) Inter-pin shorts and mounting errors

Take caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any

connection error or if pins are shorted together. Also, connecting the power supply in reverse polarity can damage the IC.

Take precautions against reverse polarity when connecting the power supply lines, such as establishing an external diode

between the power supply and the IC power supply pin.

6) Operation in strong electromagnetic fields

Using this product in strong electromagnetic fields may cause IC malfunctions. Take extreme caution with electromagnetic

fields.

7) Testing on application boards

When testing the IC on an application board, connecting a capacitor to a low impedance pin subjects the IC to stress.

Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to or

removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic

measure. Use similar precaution when transporting or storing the IC.

8) Regarding the input pin of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements, in order to keep them isolated.

P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode

or transistor. For example, the relation between each potential is as follows:

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, as well as operating malfunctions and physical damage. Therefore, do not use methods by

which parasitic diodes operate, such as applying a voltage lower than the GND (P substrate) voltage to an input pin.

Resistor

Transistor (NPN)

N

N

N P

+

P

+

P

P substrate

GND

Parasitic element

Pin A

N

N

P

+

P

+

P

P substrate

GND

Parasitic element

Pin B

C

B

E

N

GND

Pin A

Pin B

Other adjacent elements

E

B

C

GND

Parasitic

element

Appendix: Example of monolithic IC structure

Parasitic

element