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Datasheet

Datasheet

BD62012FS

TSZ02201-0828ABB00020-1-2

© 2013 ROHM Co., Ltd. All rights reserved.

15.MAR.2013 Rev.003

http://www.rohm.com

TSZ22111 · 15 · 001

7) Output duty pulse width limiter

Pulse width duty is controlled during PWM switching in order to ensure the operation of external power transistor. The

forcibly provided to prevent external power transistors to turn-on simultaneously in upper and lower side in driver output

maximum duty of 120° square wave drive at start up is 90% (typical).

8) Phase control setting

The driving signal phase can be advanced to the hall signal for phase control. The lead angle is set by forcing DC

voltage to the PC pin. The input voltage is converted digitally by a 6-bit A/D converter, in which internal VREG voltage is

assumed to be full-scale, and the converted data is processed by a logic circuit. The lead angle can be set from 0° to

+30° at 1° intervals, and updated fourth hall cycle of phase W falling edge. Phase control function only operates at 150°

commutation mode. However, the controller forces PC pin voltage to ground (no lead angle) during testing mode. The

VSP offset voltage (Figure 29) is buffered to PCT pin, to connect an external resistor between PCT pin and ground. The

the lead angle setting is followed with the duty control voltage, and the performance of the motor can be improved.

capability is a 100 µA or less.

Figure 4. Phase control setting example 1

Figure 5. Phase control setting example 2

9) Overcurrent protection (OCP) circuit

The over current protection circuit can be activated by connecting a low value resistor for current detection between the

external output stage ground and the controller IC ground. When the RCL pin voltage reaches or surpasses the threshold

value, the controller forces all the upper switching arm inputs low (UH, VH, WH = L, L, L), thus initiating the overcurrent

protection operation. When the RCL pin voltage swings below the ground, it is recommended to insert a resistor - 1.5 k

Ω

or more - between RCL pin and current detection resistor to prevent malfunction. Since this protection circuit is not a

latch type, it returns to normal operation - synchronizing with the carrier frequency - once the RCL pin voltage falls below

the threshold voltage. A filter is built into the overcurrent detection circuit to prevent malfunctions, and does not activate

10) Under voltage lock out (UVLO) circuit

To secure the lowest power supply voltage necessary to operate the controller, and to prevent under voltage

operation and returns the chip to normal operation.

The voltage monitor circuit (4.0V nominal) is built-in for the VREG voltage. Therefore, the UVLO circuit does not release

more.

L.A.

VSP

PC

PCT

VSP

ADC

L.A.

L.A.

VSP

PC

PCT

VREG

VSP

ADC

L.A.