XRT8020IL datasheet(6/12 Pages) EXAR

6 / 12 page

XRT8020

REV. 1.0.2

650 MHZ CLOCK & CRYSTAL MULTIPLIER WITH LVDS OUTPUTS

FIGURE 3. LVDS OUTPUT WAVEFORMS AND TEST CIRCUITS

1.0

CALIBRATION

TABLE 1: FREQUENCY SELECTION TABLE

FS0

PIN 10

FS1

PIN 9

CRYSTAL OR CLOCK

FREQUENCY

INTERNAL

CAPACITOR

MULTIPLY

RATIO

OUTPUT

DIVIDE

OUTPUT

FREQUENCY

78.0 MHz Clock

624 MHz

39.0 MHz

12 pF

16x

624 MHz

19.5 MHz

20 pF

32x

624 MHz

19.5 MHz

20 pF

32x

312 MHz

NOTES:

1. Use Parallel Fundamental mode crystal

2. FS0 has an internal 50K

Ω pull-up resistor to VDD

3. FS1 has an internal 50K

Ω pull-down resistor to GND

TABLE 2: POWER-DOWN AND OUTPUT TRI-STATE SELECTION TABLE

PIN 8

PIN 7

STATUS

NOTES:

Outputs tri-stated and chip Powered-down

1. “X" = Don't care

2. PD and OE have an internal 50K

Ω pull-down resis-

tor to ground.

Output tri-stated

OUT

L =5 pF

L = 100Ω

OUTP

OUTN

OUT

OUTP

OUTN

Ω

LDVS Levels Test Circuit

LDVS Switching Test Circuit

OUTP

OUTN

80%

20%

80%

20%

VCM (Differential)

LDVS Transition Time Waveform

0V (Differential)

VOUT

50%

skew

XRT8020IL Datasheet(PDF) 6 Page - Exar Corporation

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