AD1934_13 datasheet(25/28 Pages) AD

25 / 28 page

Data Sheet

AD1934

Rev. D | Page 25 of 28

APPLICATION CIRCUITS

Typical applications circuits are shown in Figure 21, Figure 22,

and Figure 23. Recommended loop filters for LR clock and

master clock as the PLL reference are shown in Figure 21.

Output filters for the DAC outputs are shown in Figure 22 and

Figure 23 for the noninverting and inverting cases, respectively.

39nF

2.2nF

LRCLK

AVDD2

3.32kΩ

5.6nF

390pF

MCLK

AVDD2

562Ω

Figure 21. Recommended Loop Filters for LRCLK or MCLK PLL Reference

OP275

–

4.75kΩ

4.7µF

DAC OUT

240pF

NPO

270pF

NPO

3.3nF

NPO

AUDIO

OUTPUT

4.99kΩ

604Ω

4.99kΩ

49.9kΩ

Figure 22. Typical DAC Output Filter Circuit (Single-Ended, Noninverting)

OP275

–

3.01kΩ

11kΩ

4.7µF

DAC

OUT

0.1µF

270pF

NPO

68pF

NPO

2.2nF

NPO

AUDIO

OUTPUT

604Ω

49.9kΩ

11kΩ

Figure 23. Typical DAC Output Filter Circuit (Single-Ended, Inverting)

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