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AD9528 Datasheet(PDF) 53 Page - Analog Devices

Part # AD9528
Description  JESD204B Clock Generator with 14 LVDS/HSTL Outputs
PDF  67 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9528 Datasheet(HTML) 53 Page - Analog Devices

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Data Sheet
AD9528
Rev. D | Page 53 of 67
CLOCK PART FAMILY ID (REGISTER 0x0003 TO REGISTER 0x0006)
Table 39. Clock Part Family ID
Address
Bits
Bit Name
Description
0x0003
[7:4]
Reserved
Reserved.
[3:0]
Chip type, Bits[3:0]
The Analog Devices unified SPI protocol reserves this read only register location for
identifying the type of device. The default value of 0x05 identifies the AD9528 as a clock IC.
0x0004
[7:4]
Clock part serial ID, Bits[3:0]
The Analog Devices unified SPI protocol reserves this read only register location as the
lower four bits of the clock part serial ID that, along with Register 0x0005, uniquely
identifies the AD9528 within the Analog Devices clock chip family. No other Analog
Devices chip that adheres to the Analog Devices unified SPI has these values for
Register 0x0003, Register 0x0004, and Register 0x0005. The clock part serial ID is 0x00F;
for these four bits it is 0xF.
[3:0]
Reserved
Default = 0xF.
0x0005
[7:0]
Clock part serial ID,
Bits[11:4]
The Analog Devices unified SPI protocol reserves this read only register location as the
upper eight bits of the clock part serial ID that, along with Register 0x0004, uniquely
identifies the AD9528 within the Analog Devices clock chip family. No other Analog
Devices chip that adheres to the Analog Devices unified SPI has these values for
Register 0x0003, Register 0x0004, and Register 0x0005. Default: 0x00.
0x0006
[7:0]
Part versions, Bits[7:0]
The Analog Devices unified SPI protocol reserves this read only register location for
identifying the die revision. Default = 0x03.
SPI VERSION (REGISTER 0x000B)
Table 40. SPI Version
Bits
Bit Name
Description
[7:0]
SPI version, Bits[7:0]
The Analog Devices unified SPI protocol reserves this read only register location for identifying the version
of the unified SPI protocol. Default = 0x00.
VENDOR ID (REGISTER 0x000C TO REGISTER 0x000D)
Table 41. Vendor ID
Address
Bits
Bit Name
Description
0x000C
[7:0]
Vendor ID, Bits[7:0]
The Analog Devices unified SPI protocol reserves this read only register location for identifying
Analog Devices as the chip vendor of this device. All Analog Devices devices adhering to the
unified serial port specification have the same value in this register. Default = 0x56.
0x000D
[7:0]
Vendor ID, Bits[15:8]
The Analog Devices unified SPI protocol reserves this read only register location for identifying
Analog Devices as the chip vendor of this device. All Analog Devices devices adhering to the
unified serial port specification have the same value in this register. Default = 0x04.
IO_UPDATE (REGISTER 0x000F)
Table 42. IO_UPDATE
Bits
Bit Name
Description
[7:1]
Reserved
Reserved. Default = 0000000b.
0
IO_UPDATE
Writing a 1 to this bit transfers the data in the serial input/output buffer registers to the internal control registers of the
device. This is an autoclearing bit.



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